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Searched refs:dq_mapping (Results 1 – 8 of 8) sorted by relevance

/u-boot/board/freescale/ls2080aqds/
A Dddr.c105 pdimm[slot].dq_mapping[0] = pdimm[slot].dq_mapping[8]; in fsl_ddr_board_options()
106 pdimm[slot].dq_mapping[1] = pdimm[slot].dq_mapping[9]; in fsl_ddr_board_options()
107 pdimm[slot].dq_mapping[2] = pdimm[slot].dq_mapping[6]; in fsl_ddr_board_options()
108 pdimm[slot].dq_mapping[3] = pdimm[slot].dq_mapping[7]; in fsl_ddr_board_options()
112 pdimm[slot].dq_mapping[9] = 0; in fsl_ddr_board_options()
113 pdimm[slot].dq_mapping[10] = 0; in fsl_ddr_board_options()
114 pdimm[slot].dq_mapping[11] = 0; in fsl_ddr_board_options()
115 pdimm[slot].dq_mapping[12] = 0; in fsl_ddr_board_options()
116 pdimm[slot].dq_mapping[13] = 0; in fsl_ddr_board_options()
117 pdimm[slot].dq_mapping[14] = 0; in fsl_ddr_board_options()
[all …]
/u-boot/board/freescale/ls2080ardb/
A Dddr.c107 pdimm[slot].dq_mapping[0] = pdimm[slot].dq_mapping[8]; in fsl_ddr_board_options()
108 pdimm[slot].dq_mapping[1] = pdimm[slot].dq_mapping[9]; in fsl_ddr_board_options()
109 pdimm[slot].dq_mapping[2] = pdimm[slot].dq_mapping[6]; in fsl_ddr_board_options()
110 pdimm[slot].dq_mapping[3] = pdimm[slot].dq_mapping[7]; in fsl_ddr_board_options()
114 pdimm[slot].dq_mapping[9] = 0; in fsl_ddr_board_options()
115 pdimm[slot].dq_mapping[10] = 0; in fsl_ddr_board_options()
116 pdimm[slot].dq_mapping[11] = 0; in fsl_ddr_board_options()
117 pdimm[slot].dq_mapping[12] = 0; in fsl_ddr_board_options()
118 pdimm[slot].dq_mapping[13] = 0; in fsl_ddr_board_options()
119 pdimm[slot].dq_mapping[14] = 0; in fsl_ddr_board_options()
[all …]
/u-boot/board/freescale/t102xrdb/
A Dddr.c184 .dq_mapping[0] = 0x0,
185 .dq_mapping[1] = 0x0,
186 .dq_mapping[2] = 0x0,
187 .dq_mapping[3] = 0x0,
188 .dq_mapping[4] = 0x0,
189 .dq_mapping[5] = 0x0,
190 .dq_mapping[6] = 0x0,
191 .dq_mapping[7] = 0x0,
192 .dq_mapping[8] = 0x0,
193 .dq_mapping[9] = 0x0,
[all …]
/u-boot/board/freescale/ls1043ardb/
A Dddr.c138 .dq_mapping[0] = 0x0,
139 .dq_mapping[1] = 0x0,
140 .dq_mapping[2] = 0x0,
141 .dq_mapping[3] = 0x0,
142 .dq_mapping[4] = 0x0,
143 .dq_mapping[5] = 0x0,
144 .dq_mapping[6] = 0x0,
145 .dq_mapping[7] = 0x0,
146 .dq_mapping[8] = 0x0,
147 .dq_mapping[9] = 0x0,
[all …]
/u-boot/drivers/ddr/fsl/
A Dinteractive.c290 DIMM_PARM_HEX(dq_mapping[0]), in fsl_ddr_dimm_parameters_edit()
291 DIMM_PARM_HEX(dq_mapping[1]), in fsl_ddr_dimm_parameters_edit()
292 DIMM_PARM_HEX(dq_mapping[2]), in fsl_ddr_dimm_parameters_edit()
293 DIMM_PARM_HEX(dq_mapping[3]), in fsl_ddr_dimm_parameters_edit()
294 DIMM_PARM_HEX(dq_mapping[4]), in fsl_ddr_dimm_parameters_edit()
295 DIMM_PARM_HEX(dq_mapping[5]), in fsl_ddr_dimm_parameters_edit()
296 DIMM_PARM_HEX(dq_mapping[6]), in fsl_ddr_dimm_parameters_edit()
297 DIMM_PARM_HEX(dq_mapping[7]), in fsl_ddr_dimm_parameters_edit()
298 DIMM_PARM_HEX(dq_mapping[8]), in fsl_ddr_dimm_parameters_edit()
299 DIMM_PARM_HEX(dq_mapping[9]), in fsl_ddr_dimm_parameters_edit()
[all …]
A Dctrl_regs.c2137 ((dimm_params[i].dq_mapping[1] & 0x3F) << 20) | in set_ddr_dq_mapping()
2138 ((dimm_params[i].dq_mapping[2] & 0x3F) << 14) | in set_ddr_dq_mapping()
2139 ((dimm_params[i].dq_mapping[3] & 0x3F) << 8) | in set_ddr_dq_mapping()
2140 ((dimm_params[i].dq_mapping[4] & 0x3F) << 2); in set_ddr_dq_mapping()
2143 ((dimm_params[i].dq_mapping[6] & 0x3F) << 20) | in set_ddr_dq_mapping()
2144 ((dimm_params[i].dq_mapping[7] & 0x3F) << 14) | in set_ddr_dq_mapping()
2145 ((dimm_params[i].dq_mapping[10] & 0x3F) << 8) | in set_ddr_dq_mapping()
2146 ((dimm_params[i].dq_mapping[11] & 0x3F) << 2); in set_ddr_dq_mapping()
2151 ((dimm_params[i].dq_mapping[15] & 0x3F) << 8) | in set_ddr_dq_mapping()
2152 ((dimm_params[i].dq_mapping[16] & 0x3F) << 2); in set_ddr_dq_mapping()
[all …]
A Dddr4_dimm_params.c362 pdimm->dq_mapping[i] = spd->mapping[i]; in ddr_compute_dimm_parameters()
/u-boot/include/
A Dfsl_ddr_dimm_params.h110 unsigned int dq_mapping[18]; member

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