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Searched refs:dramtmg0 (Results 1 – 14 of 14) sorted by relevance

/u-boot/board/compulab/cl-som-imx7/
A Dspl.c94 cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; in cl_som_imx7_spl_dram_cfg_size()
105 cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; in cl_som_imx7_spl_dram_cfg_size()
116 cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E1109; in cl_som_imx7_spl_dram_cfg_size()
127 cl_som_imx7_spl_ddrc_regs_val.dramtmg0 = 0x090E110A; in cl_som_imx7_spl_dram_cfg_size()
/u-boot/board/technexion/pico-imx7d/
A Dspl.c44 .dramtmg0 = 0x09081109,
61 .dramtmg0 = 0x09081109,
/u-boot/arch/arm/mach-imx/mx7/
A Dddr.c69 writel(ddrc_regs_val->dramtmg0, &ddrc_regs->dramtmg0); in mx7_dram_cfg()
/u-boot/arch/arm/include/asm/arch-mx7/
A Dmx7-ddr.h32 u32 dramtmg0; /* 0x0100 */ member
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun8i_a33.h88 u32 dramtmg0; /* 0x58 dram timing parameters register 0 */ member
A Ddram_sun8i_a83t.h88 u32 dramtmg0; /* 0x58 dram timing parameters register 0 */ member
A Ddram_sun8i_a23.h120 u32 dramtmg0; /* 0x100 */ member
/u-boot/drivers/ram/stm32mp1/
A Dstm32mp1_ddr.h71 u32 dramtmg0; member
A Dstm32mp1_ddr_regs.h47 u32 dramtmg0; /* 0x100 SDRAM Timing 0*/ member
A Dstm32mp1_ddr.c105 DDRCTL_REG_TIMING(dramtmg0),
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun8i_a23.c160 &mctl_ctl->dramtmg0); in mctl_init()
A Ddram_sun8i_a33.c141 writel(reg_val, &mctl_ctl->dramtmg0); in auto_set_timing_para()
A Ddram_sun8i_a83t.c173 writel(reg_val, &mctl_ctl->dramtmg0); in auto_set_timing_para()
/u-boot/arch/arm/include/asm/arch-imx8m/
A Dddr.h34 u32 dramtmg0; member
131 u32 dramtmg0; member

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