Searched refs:dsr (Results 1 – 14 of 14) sorted by relevance
32 u32 dsr; /* Status Reg */ member76 __raw_writel(DSR_WEF, &data.regs->dsr); in clear_write_error()80 if ((__raw_readl(&data.regs->dsr) & DSR_WEF) == 0) in clear_write_error()107 if ((__raw_readl(&data.regs->dsr) & (DSR_WCF | DSR_WEF)) != 0) { in di_write_wait()118 if (__raw_readl(&data.regs->dsr) & DSR_WEF) { in di_write_wait()139 if (__raw_readl(&data.regs->dsr) & DSR_NVF) { in di_init()140 rc = DI_WRITE_WAIT(DSR_NVF | DSR_SVF, dsr); in di_init()154 if (__raw_readl(&data.regs->dsr) & DSR_CAF) { in di_init()155 rc = DI_WRITE_WAIT(DSR_CAF, dsr); in di_init()
114 dsr, dsb) \ argument125 [REG_DS] = {dsr, dsb}, \
78 unsigned long dsr; member
133 .dsr = 0xffffffff,194 mmc->dsr = 0xffffffff; in mmc_create()
410 mmc->dsr = 0xffffffff; in mmc_bind()
2543 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { in mmc_startup()2545 cmd.cmdarg = (mmc->dsr & 0xffff) << 16; in mmc_startup()2963 mmc->dsr = val; in mmc_set_dsr()
1614 mmc->dsr = ESDHC_DRIVER_STAGE_VALUE; in fsl_esdhc_probe()
111 uint dsr; /* DMA destination stride register */ member
1168 u16 dsr; member
20 u32 dsr; /* 0x1C Data Size */ member
30 - dsr-override : Override the DTS modem status signal. This signal will always50 dsr-override;
248 dsr-override;264 dsr-override;280 dsr-override;
415 dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
682 uint dsr; member
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