Searched refs:dv_reg (Results 1 – 11 of 11) sorted by relevance
212 dv_reg TX0CP;213 dv_reg TX1CP;214 dv_reg TX2CP;215 dv_reg TX3CP;216 dv_reg TX4CP;217 dv_reg TX5CP;218 dv_reg TX6CP;219 dv_reg TX7CP;220 dv_reg RX0CP;221 dv_reg RX1CP;[all …]
546 dv_reg dly = 0xff; in davinci_eth_ch_teardown()547 dv_reg cnt; in davinci_eth_ch_teardown()
170 dv_reg revid;172 dv_reg ptcmd;204 dv_reg pllm;216 dv_reg cken;355 dv_reg cr;357 dv_reg ger;359 dv_reg ecr1;360 dv_reg ecr2;361 dv_reg ecr3;363 dv_reg hier;[all …]
114 dv_reg mmcctl;115 dv_reg mmcclk;116 dv_reg mmcst0;117 dv_reg mmcst1;118 dv_reg mmcim;119 dv_reg mmctor;120 dv_reg mmctod;124 dv_reg mmcdrr;125 dv_reg mmcdxr;126 dv_reg mmccmd;[all …]
30 dv_reg revision;31 dv_reg control;32 dv_reg status;33 dv_reg emulation;34 dv_reg mode;35 dv_reg autoreq;37 dv_reg teardown;38 dv_reg intsrc;41 dv_reg intmsk;44 dv_reg intsrcmsk;[all …]
18 dv_reg *mux; /* Address of mux register */
66 dv_reg lvl; /* 0x0c */67 dv_reg flg; /* 0x10 */68 dv_reg pc0; /* 0x14 */69 dv_reg pc1; /* 0x18 */70 dv_reg pc2; /* 0x1c */71 dv_reg pc3; /* 0x20 */72 dv_reg pc4; /* 0x24 */73 dv_reg pc5; /* 0x28 */74 dv_reg rsvd[3];77 dv_reg buf; /* 0x40 */[all …]
30 typedef volatile unsigned int dv_reg; typedef
36 typedef volatile unsigned int dv_reg; typedef
52 const dv_reg *mux = pins[i].mux; in davinci_configure_pin_mux()
22 typedef volatile unsigned int dv_reg; typedef
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