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Searched refs:dwords (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-mvebu/
A Defuse.c75 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
76 val.dwords.d[1] = readl(&efuse->bits_63_32); in do_prog_efuse()
82 val.dwords.d[0] |= (new_val->dwords.d[0] & mask0); in do_prog_efuse()
83 val.dwords.d[1] |= (new_val->dwords.d[1] & mask1); in do_prog_efuse()
86 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
88 writel(val.dwords.d[1], &efuse->bits_63_32); in do_prog_efuse()
120 if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1)) in prog_efuse()
166 val->dwords.d[0] = readl(&efuse->bits_31_0); in mvebu_read_efuse()
167 val->dwords.d[1] = readl(&efuse->bits_63_32); in mvebu_read_efuse()
212 *val = fuse_line.dwords.d[word]; in fuse_read()
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/u-boot/arch/arm/mach-mvebu/include/mach/
A Defuse.h21 } dwords; member
/u-boot/drivers/mtd/spi/
A Dspi-nor-core.c1705 u32 dwords[BFPT_DWORD_MAX]; member
1875 bfpt.dwords[i] = le32_to_cpu(bfpt.dwords[i]); in spi_nor_parse_bfpt()
1878 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) { in spi_nor_parse_bfpt()
1892 params->size = bfpt.dwords[BFPT_DWORD(2)]; in spi_nor_parse_bfpt()
1915 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) { in spi_nor_parse_bfpt()
1923 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift; in spi_nor_parse_bfpt()
1933 half = bfpt.dwords[er->dword] >> er->shift; in spi_nor_parse_bfpt()
1960 params->page_size = bfpt.dwords[BFPT_DWORD(11)]; in spi_nor_parse_bfpt()
1966 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) { in spi_nor_parse_bfpt()

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