Searched refs:dx1gcr (Results 1 – 8 of 8) sorted by relevance
/u-boot/arch/arm/mach-sunxi/ |
A D | dram_sun8i_a23.c | 123 clrsetbits_le32(&mctl_phy->dx1gcr, 0x3800, 0x2000); in mctl_init() 144 clrbits_le32(&mctl_phy->dx1gcr, 0x600); in mctl_init() 247 writel(0, &mctl_phy->dx1gcr); in mctl_init()
|
A D | dram_sun6i.c | 153 writel(MCTL_DX_GCR | MCTL_DX_GCR_EN, &mctl_phy->dx1gcr); in mctl_channel_init()
|
/u-boot/drivers/ram/stm32mp1/ |
A D | stm32mp1_ddr.h | 125 u32 dx1gcr; member
|
A D | stm32mp1_tuning.c | 535 clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); in bit_deskew() 902 setbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); in bit_deskew() 948 clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); in eye_training() 1370 clrbits_le32(&phy->dx1gcr, DDRPHYC_DXNGCR_DXEN); in read_dqs_gating()
|
A D | stm32mp1_ddr_regs.h | 208 u32 dx1gcr; /* 0x200 Byte lane 1 General Configuration*/ member
|
A D | stm32mp1_ddr.c | 162 DDRPHY_REG_REG(dx1gcr),
|
/u-boot/arch/arm/include/asm/arch-sunxi/ |
A D | dram_sun8i_a23.h | 242 u32 dx1gcr; /* 0x200 */ member
|
A D | dram_sun6i.h | 225 u32 dx1gcr; /* 0x200 */ member
|
Completed in 17 milliseconds