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Searched refs:ecc_ctrl (Results 1 – 4 of 4) sorted by relevance

/u-boot/cmd/ti/
A Dddr3.c194 u32 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in ddr_memory_ecc_err() local
211 ecc_ctrl = ECC_START_ADDR1 | (ECC_END_ADDR1 << 16); in ddr_memory_ecc_err()
215 writel(ecc_ctrl, &emif->emif_ecc_ctrl_reg); in ddr_memory_ecc_err()
237 u32 start_addr, end_addr, range, ecc_ctrl; in is_addr_valid() local
240 ecc_ctrl = EMIF_ECC_REG_ECC_ADDR_RGN_1_EN_MASK; in is_addr_valid()
243 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in is_addr_valid()
248 if (ecc_ctrl & EMIF_ECC_REG_ECC_ADDR_RGN_1_EN_MASK) { in is_addr_valid()
259 if (ecc_ctrl & EMIF_ECC_REG_ECC_ADDR_RGN_2_EN_MASK) { in is_addr_valid()
276 u32 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in is_ecc_enabled() local
278 return (ecc_ctrl & EMIF_ECC_CTRL_REG_ECC_EN_MASK) && in is_ecc_enabled()
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/u-boot/arch/arm/mach-keystone/
A Dinit.c44 u32 ecc_ctrl[KS2_OSR_NUM_RAM_BANKS]; in osr_init() local
66 ecc_ctrl[i] = readl(base + KS2_OSR_ECC_CTRL) ^ in osr_init()
69 writel(ecc_ctrl[i], KS2_MSMC_DATA_BASE + i * 4); in osr_init()
70 writel(ecc_ctrl[i], base + KS2_OSR_ECC_CTRL); in osr_init()
79 writel(ecc_ctrl[i] | in osr_init()
/u-boot/drivers/mtd/nand/raw/
A Dlpc32xx_nand_slc.c173 u32 i, dmasrc, ctrl, ecc_ctrl, oob_ctrl, dmadst; in lpc32xx_nand_dma_configure() local
181 ecc_ctrl = 0x5 | in lpc32xx_nand_dma_configure()
256 dmalist_cur_ecc->next_ctrl = ecc_ctrl; in lpc32xx_nand_dma_configure()
/u-boot/arch/x86/cpu/quark/
A Dsmc.c2547 u32 ecc_ctrl; in ecc_enable() local
2567 ecc_ctrl = (DECCCTRL_SBEEN | DECCCTRL_DBEEN | DECCCTRL_ENCBGEN); in ecc_enable()
2568 msg_port_write(MEM_CTLR, DECCCTRL, ecc_ctrl); in ecc_enable()

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