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Searched refs:ecc_range_ctrl (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/include/asm/arch-aspeed/
A Dsdram_ast2500.h117 u32 ecc_range_ctrl; member
A Dsdram_ast2600.h149 u32 ecc_range_ctrl; /* offset 0x54 */ member
/u-boot/drivers/ram/aspeed/
A Dsdram_ast2600.c837 writel(0x07FFFFFF, &regs->ecc_range_ctrl); in ast2600_sdrammc_common_init()
902 hw_size = readl(&regs->ecc_range_ctrl) & SDRAM_ECC_RANGE_ADDR_MASK; in ast2600_sdrammc_update_size()
926 writel(((info->info.size >> 20) - 1) << 20, &regs->ecc_range_ctrl); in ast2600_sdrammc_ecc_enable()

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