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Searched refs:efuse (Results 1 – 25 of 73) sorted by relevance

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/u-boot/board/ti/dra7xx/
A Devm.c385 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
396 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
407 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
424 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
433 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
444 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
455 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
472 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
481 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
502 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/u-boot/arch/arm/mach-mvebu/
A Defuse.c75 val.dwords.d[0] = readl(&efuse->bits_31_0); in do_prog_efuse()
77 val.lock = readl(&efuse->bit64); in do_prog_efuse()
86 writel(val.dwords.d[0], &efuse->bits_31_0); in do_prog_efuse()
90 writel(val.lock, &efuse->bit64); in do_prog_efuse()
98 struct mvebu_hd_efuse *efuse; in prog_efuse() local
105 efuse = get_efuse_line(nr); in prog_efuse()
106 if (!efuse) in prog_efuse()
152 struct mvebu_hd_efuse *efuse; in mvebu_read_efuse() local
159 efuse = get_efuse_line(nr); in mvebu_read_efuse()
160 if (!efuse) in mvebu_read_efuse()
[all …]
A DMakefile29 obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
/u-boot/doc/device-tree-bindings/exynos/
A Dtmu.txt14 - samsung,efuse-min-value : SOC efuse min value (Constant 40)
15 - efuse-value should be more than this value.
16 - samsung,efuse-value : SOC actual efuse value (Literal value)
19 - samsung,efuse-max-value : SoC max efuse value (Constant 100)
20 - efuse-value should be less than this value.
39 samsung,efuse-min-value = <40>;
40 samsung,efuse-value = <55>;
41 samsung,efuse-max-value = <100>;
/u-boot/board/ti/am57xx/
A Dboard.c362 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
373 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
380 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
390 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
410 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
421 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
428 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
438 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
458 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
469 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
[all …]
/u-boot/drivers/misc/
A Drockchip-efuse.c90 struct rockchip_efuse_regs *efuse = in rockchip_rk3399_efuse_read() local
108 &efuse->ctrl); in rockchip_rk3399_efuse_read()
111 setbits_le32(&efuse->ctrl, in rockchip_rk3399_efuse_read()
114 out_value = readl(&efuse->dout); in rockchip_rk3399_efuse_read()
115 clrbits_le32(&efuse->ctrl, RK3399_STROBE); in rockchip_rk3399_efuse_read()
123 writel(RK3399_PD | RK3399_CSB, &efuse->ctrl); in rockchip_rk3399_efuse_read()
/u-boot/arch/arm/mach-omap2/
A Dclocks-common.c496 if (!v->efuse.reg[opp]) in optimize_vcore_voltage()
499 switch (v->efuse.reg_bits) { in optimize_vcore_voltage()
501 val = readw(v->efuse.reg[opp]); in optimize_vcore_voltage()
504 val = readl(v->efuse.reg[opp]); in optimize_vcore_voltage()
508 v->efuse.reg[opp], v->efuse.reg_bits); in optimize_vcore_voltage()
514 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]); in optimize_vcore_voltage()
519 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp], in optimize_vcore_voltage()
603 abb_setup(vcores->mpu.efuse.reg[opp], in scale_vcores()
616 abb_setup(vcores->mm.efuse.reg[opp], in scale_vcores()
629 abb_setup(vcores->gpu.efuse.reg[opp], in scale_vcores()
[all …]
/u-boot/arch/arm/dts/
A Domap4460.dtsi58 "efuse-address";
61 /*uV ABB efuse rbb_m fbb_m vset_m*/
76 "efuse-address";
79 /*uV ABB efuse rbb_m fbb_m vset_m*/
A Dexynos5420-smdk5420.dts31 samsung,efuse-min-value = <40>;
32 samsung,efuse-value = <55>;
33 samsung,efuse-max-value = <100>;
A Duniphier-pro5.dtsi389 efuse@100 {
390 compatible = "socionext,uniphier-efuse";
394 efuse@130 {
395 compatible = "socionext,uniphier-efuse";
399 efuse@200 {
400 compatible = "socionext,uniphier-efuse";
404 efuse@300 {
405 compatible = "socionext,uniphier-efuse";
409 efuse@400 {
410 compatible = "socionext,uniphier-efuse";
A Dkeystone-k2e-netcp.dtsi110 reg-names = "efuse";
189 efuse-mac = <1>;
201 efuse-mac = <0>;
A Dkeystone-k2l-netcp.dtsi109 reg-names = "efuse";
172 efuse-mac = <1>;
184 efuse-mac = <0>;
A Dkeystone-k2hk-netcp.dtsi126 reg-names = "efuse";
191 efuse-mac = <1>;
203 efuse-mac = <0>;
A Dkeystone-k2g-netcp.dtsi100 reg-names = "efuse";
148 efuse-mac = <1>;
A Dexynos5800-peach-pi.dts66 samsung,efuse-min-value = <40>;
67 samsung,efuse-value = <55>;
68 samsung,efuse-max-value = <100>;
A Duniphier-pro4.dtsi415 efuse@100 {
416 compatible = "socionext,uniphier-efuse";
420 efuse@130 {
421 compatible = "socionext,uniphier-efuse";
425 efuse@200 {
426 compatible = "socionext,uniphier-efuse";
A Duniphier-sld8.dtsi351 efuse@100 {
352 compatible = "socionext,uniphier-efuse";
356 efuse@200 {
357 compatible = "socionext,uniphier-efuse";
A Duniphier-ld4.dtsi347 efuse@100 {
348 compatible = "socionext,uniphier-efuse";
352 efuse@130 {
353 compatible = "socionext,uniphier-efuse";
A Domap443x.dtsi53 /*uV ABB efuse rbb_m fbb_m vset_m*/
A Dexynos5250-smdk5250.dts99 samsung,efuse-min-value = <40>;
100 samsung,efuse-value = <55>;
101 samsung,efuse-max-value = <100>;
A Duniphier-ld11.dtsi562 efuse@100 {
563 compatible = "socionext,uniphier-efuse";
567 efuse@200 {
568 compatible = "socionext,uniphier-efuse";
A Dexynos5420-peach-pit.dts54 samsung,efuse-min-value = <40>;
55 samsung,efuse-value = <55>;
56 samsung,efuse-max-value = <100>;
A Domap5.dtsi490 "efuse-address", "ldo-address";
502 /*uV ABB efuse rbb_m fbb_m vset_m*/
520 "efuse-address", "ldo-address";
532 /*uV ABB efuse rbb_m fbb_m vset_m*/
/u-boot/arch/arm/mach-omap2/omap5/
A Dhw_data.c369 .mpu.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MPU_OPNO_VMIN,
370 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
372 .core.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_CORE_OPNO_VMIN,
373 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
375 .mm.efuse.reg[OPP_NOM] = OMAP5_ES2_PROD_MM_OPNO_VMIN,
376 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
/u-boot/arch/arm/mach-aspeed/ast2600/
A Dboard_common.c96 if (readl(scu->efuse) & SCU_EFUSE_DIS_VGA) in board_add_ram_info()

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