Home
last modified time | relevance | path

Searched refs:emc (Results 1 – 10 of 10) sorted by relevance

/u-boot/arch/arm/mach-lpc32xx/
A Ddram.c30 writel(1, &emc->ctrl); in ddr_init()
31 writel(0, &emc->config); in ddr_init()
33 writel(0x7FF, &emc->refresh); in ddr_init()
49 writel(dram->trrd, &emc->t_rrd); in ddr_init()
50 writel(dram->tmrd, &emc->t_mrd); in ddr_init()
51 writel(dram->tcdlr, &emc->t_cdlr); in ddr_init()
56 writel(0x00000193, &emc->control); in ddr_init()
59 writel(0x00000113, &emc->control); in ddr_init()
67 writel(0x00000093, &emc->control); in ddr_init()
70 writel(0x00000093, &emc->control); in ddr_init()
[all …]
/u-boot/board/timll/devkit3250/
A Ddevkit3250.c21 static struct emc_regs *emc = (struct emc_regs *)EMC_BASE; variable
63 emc->stat[0].config = EMC_STAT_CONFIG_PB | EMC_STAT_CONFIG_16BIT; in board_init()
66 emc->stat[0].waitwen = EMC_STAT_WAITWEN(1); in board_init()
67 emc->stat[0].waitoen = EMC_STAT_WAITOEN(0); in board_init()
68 emc->stat[0].waitrd = EMC_STAT_WAITRD(12); in board_init()
69 emc->stat[0].waitpage = EMC_STAT_WAITPAGE(12); in board_init()
70 emc->stat[0].waitwr = EMC_STAT_WAITWR(5); in board_init()
71 emc->stat[0].waitturn = EMC_STAT_WAITTURN(2); in board_init()
/u-boot/arch/arm/mach-tegra/tegra20/
A Demc.c243 struct emc_ctlr *emc; in tegra_set_emc() local
247 err = decode_emc(blob, rate, &emc, &table); in tegra_set_emc()
257 u32 addr = (uintptr_t)emc + emc_reg_addr[i]; in tegra_set_emc()
A DMakefile16 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
A Dwarmboot.c131 struct emc_ctlr *emc = emc_get_controller(gd->fdt_blob); in warmboot_save_sdram_params() local
172 fbio_spare.word = readl(&emc->fbio_spare); in warmboot_save_sdram_params()
/u-boot/arch/arm/mach-tegra/
A DMakefile25 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
/u-boot/arch/arm/dts/
A Dtegra20-seaboard.dts737 emc-table@190000 {
739 compatible = "nvidia,tegra20-emc-table";
741 nvidia,emc-registers = <0x0000000c 0x00000026
755 emc-table@380000 {
757 compatible = "nvidia,tegra20-emc-table";
759 nvidia,emc-registers = <0x00000017 0x0000004b
A Dtegra124.dtsi226 nvidia,external-memory-controller = <&emc>;
240 clock-names = "actmon", "emc";
603 emc: emc@7001b000 { label
604 compatible = "nvidia,tegra124-emc";
A Dtegra20.dtsi568 compatible = "nvidia,tegra20-emc";
/u-boot/doc/device-tree-bindings/clock/
A Dnvidia,tegra20-car.txt86 57 emc

Completed in 21 milliseconds