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Searched refs:emif_ddr_phy_ctlr_1 (Results 1 – 25 of 27) sorted by relevance

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/u-boot/board/phytec/phycore_am335x_r2/
A Dboard.c84 .emif_ddr_phy_ctlr_1 = 0x7,
102 .emif_ddr_phy_ctlr_1 = 0x7,
120 .emif_ddr_phy_ctlr_1 = 0x7,
/u-boot/arch/arm/mach-omap2/omap4/
A Dsdram_elpida.c46 .emif_ddr_phy_ctlr_1 = 0x049ff808
60 .emif_ddr_phy_ctlr_1 = 0x049ff418
74 .emif_ddr_phy_ctlr_1 = 0x049ff418
88 .emif_ddr_phy_ctlr_1 = 0x049ff418
/u-boot/arch/arm/mach-omap2/omap5/
A Dsdram.c46 .emif_ddr_phy_ctlr_1 = 0x0E28420d,
65 .emif_ddr_phy_ctlr_1 = 0x0E30400d,
84 .emif_ddr_phy_ctlr_1 = 0x0E28420d,
104 .emif_ddr_phy_ctlr_1 = 0x0024420A,
128 .emif_ddr_phy_ctlr_1 = 0x0034400A,
/u-boot/board/ti/am43xx/
A Dboard.c170 .emif_ddr_phy_ctlr_1 = 0x0E284006,
203 .emif_ddr_phy_ctlr_1 = 0x0E004008,
229 .emif_ddr_phy_ctlr_1 = 0x0E004008,
252 .emif_ddr_phy_ctlr_1 = 0x00048008,
275 .emif_ddr_phy_ctlr_1 = 0x0e084008,
301 .emif_ddr_phy_ctlr_1 = 0x00008009,
/u-boot/board/siemens/draco/
A Dboard.h42 unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */ member
A Dboard.c105 PRINTARGS(emif_ddr_phy_ctlr_1); in print_ddr3_timings()
225 draco_ddr3_emif_reg_data.emif_ddr_phy_ctlr_1 = in board_init_ddr()
226 settings.ddr3.emif_ddr_phy_ctlr_1; in board_init_ddr()
/u-boot/board/ti/dra7xx/
A Devm.c83 .emif_ddr_phy_ctlr_1 = 0x0E24400B,
108 .emif_ddr_phy_ctlr_1 = 0x0E24400B,
133 .emif_ddr_phy_ctlr_1 = 0x0E24400D,
158 .emif_ddr_phy_ctlr_1 = 0x0E24400E,
183 .emif_ddr_phy_ctlr_1 = 0x0E24400B,
208 .emif_ddr_phy_ctlr_1 = 0x0E24400B,
233 .emif_ddr_phy_ctlr_1 = 0x0E24400D,
258 .emif_ddr_phy_ctlr_1 = 0x0E24400D,
/u-boot/arch/arm/mach-omap2/am33xx/
A Dddr.c187 writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1); in config_sdram()
188 writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw); in config_sdram()
279 if (regs->emif_ddr_phy_ctlr_1 & 0x00040000) { in ext_phy_settings_hwlvl()
344 writel(regs->emif_ddr_phy_ctlr_1, in config_ddr_phy()
346 writel(regs->emif_ddr_phy_ctlr_1, in config_ddr_phy()
A Dchilisom.c93 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
/u-boot/board/isee/igep003x/
A Dboard.c116 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
126 .emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY,
/u-boot/board/ti/am335x/
A Dboard.c120 .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
130 .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
212 .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
224 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
235 .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY |
246 .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY_400MHz |
/u-boot/board/compulab/cm_t43/
A Dspl.c44 .emif_ddr_phy_ctlr_1 = 0x0E004008,
/u-boot/board/compulab/cm_t335/
A Dspl.c58 .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY |
/u-boot/board/BuR/brsmarc1/
A Dboard.c62 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
/u-boot/board/ti/ti816x/
A Devm.c99 .emif_ddr_phy_ctlr_1 = EMIF_PHYCFG,
/u-boot/board/BuR/brppt1/
A Dboard.c68 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
/u-boot/board/BuR/brxre1/
A Dboard.c69 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
/u-boot/arch/arm/mach-omap2/
A Demif-common.c158 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1); in lpddr2_init()
191 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); in emif_update_timings()
223 writel(regs->emif_ddr_phy_ctlr_1, in omap5_ddr3_leveling()
226 writel(regs->emif_ddr_phy_ctlr_1, in omap5_ddr3_leveling()
296 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1); in update_hwleveling_output()
297 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); in update_hwleveling_output()
1004 regs->emif_ddr_phy_ctlr_1 = in emif_calculate_regs()
1018 print_timing_reg(regs->emif_ddr_phy_ctlr_1); in emif_calculate_regs()
/u-boot/board/bosch/guardian/
A Dboard.c71 .emif_ddr_phy_ctlr_1 = MT41K128M16JT125K_EMIF_READ_LATENCY,
/u-boot/board/eets/pdu001/
A Dboard.c184 .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY,
/u-boot/board/ti/am57xx/
A Dboard.c147 .emif_ddr_phy_ctlr_1 = 0x0e24400b,
211 .emif_ddr_phy_ctlr_1 = 0x0e24400b,
274 .emif_ddr_phy_ctlr_1 = 0x0e24400f,
299 .emif_ddr_phy_ctlr_1 = 0x0e24400f,
/u-boot/board/tcl/sl50/
A Dboard.c70 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
/u-boot/board/bosch/shc/
A Dboard.c427 .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
/u-boot/board/siemens/pxm2/
A Dboard.c53 .emif_ddr_phy_ctlr_1 = 0x100005, in board_init_ddr()
/u-boot/board/siemens/rut/
A Dboard.c58 .emif_ddr_phy_ctlr_1 = 0x6, in board_init_ddr()

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