Searched refs:emif_rd_wr_lvl_ctl (Results 1 – 7 of 7) sorted by relevance
| /u-boot/board/ti/dra7xx/ |
| A D | evm.c | 91 .emif_rd_wr_lvl_ctl = 0x00000000,
116 .emif_rd_wr_lvl_ctl = 0x00000000,
141 .emif_rd_wr_lvl_ctl = 0x00000000,
166 .emif_rd_wr_lvl_ctl = 0x00000000,
191 .emif_rd_wr_lvl_ctl = 0x00000000,
216 .emif_rd_wr_lvl_ctl = 0x00000000,
241 .emif_rd_wr_lvl_ctl = 0x00000000,
266 .emif_rd_wr_lvl_ctl = 0x00000000,
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| /u-boot/board/ti/am43xx/ |
| A D | board.c | 169 .emif_rd_wr_lvl_ctl = 0x0,
211 .emif_rd_wr_lvl_ctl = 0x0,
283 .emif_rd_wr_lvl_ctl = 0x00000000,
309 .emif_rd_wr_lvl_ctl = 0x00000000,
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| /u-boot/arch/arm/mach-omap2/am33xx/ |
| A D | ddr.c | 100 writel(regs->emif_rd_wr_lvl_ctl, &emif_reg[nr]->emif_rd_wr_lvl_ctl); in config_sdram_emif4d5()
156 writel(0x80000000, &emif_reg[nr]->emif_rd_wr_lvl_ctl); in config_sdram_emif4d5()
165 while ((readl(&emif_reg[nr]->emif_rd_wr_lvl_ctl) & 0x80000000) in config_sdram_emif4d5()
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| /u-boot/arch/arm/mach-omap2/ |
| A D | emif-common.c | 234 writel(DDR3_FULL_LVL, &emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()
237 readl(&emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()
248 &emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()
253 writel(DDR3_INC_LVL, &emif->emif_rd_wr_lvl_ctl); in omap5_ddr3_leveling()
319 writel(DDR3_FULL_LVL, &emif->emif_rd_wr_lvl_ctl); in dra7_ddr3_leveling()
438 writel(regs->emif_rd_wr_lvl_ctl, &emif->emif_rd_wr_lvl_ctl); in dra7_ddr3_init()
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| /u-boot/arch/arm/mach-omap2/omap5/ |
| A D | sdram.c | 112 .emif_rd_wr_lvl_ctl = 0x00000000,
136 .emif_rd_wr_lvl_ctl = 0x00000000,
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| /u-boot/board/ti/am57xx/ |
| A D | board.c | 155 .emif_rd_wr_lvl_ctl = 0x00000000,
219 .emif_rd_wr_lvl_ctl = 0x00000000,
282 .emif_rd_wr_lvl_ctl = 0x00000000,
307 .emif_rd_wr_lvl_ctl = 0x00000000,
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| /u-boot/arch/arm/include/asm/ |
| A D | emif.h | 687 u32 emif_rd_wr_lvl_ctl; member
1231 u32 emif_rd_wr_lvl_ctl; member
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