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Searched refs:enet1_ref (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-imx/imx8m/
A Dclock_imx8mm.c797 u32 enet1_ref; in set_clk_eqos() local
801 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; in set_clk_eqos()
804 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; in set_clk_eqos()
807 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; in set_clk_eqos()
823 target = CLK_ROOT_ON | enet1_ref | in set_clk_eqos()
887 u32 enet1_ref; in set_clk_enet() local
891 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; in set_clk_enet()
894 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; in set_clk_enet()
897 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; in set_clk_enet()
913 target = CLK_ROOT_ON | enet1_ref | in set_clk_enet()
A Dclock_imx8mq.c483 u32 enet1_ref; in set_clk_enet() local
487 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; in set_clk_enet()
490 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; in set_clk_enet()
493 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; in set_clk_enet()
509 target = CLK_ROOT_ON | enet1_ref | in set_clk_enet()
/u-boot/arch/arm/mach-imx/mx7/
A Dclock.c965 u32 enet1_ref, enet2_ref; in set_clk_enet() local
973 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK; in set_clk_enet()
977 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK; in set_clk_enet()
981 enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK; in set_clk_enet()
998 target = CLK_ROOT_ON | enet1_ref | in set_clk_enet()

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