| /u-boot/drivers/mmc/ |
| A D | snps_dw_mmc.c | 32 u32 f_max; member
110 ret = dev_read_u32(dev, "max-frequency", &priv->f_max); in snps_dwmmc_of_to_plat()
111 if (!ret && priv->f_max < CLOCK_MIN) in snps_dwmmc_of_to_plat()
151 if (!priv->f_max) in snps_dwmmc_probe()
154 clock_max = min_t(unsigned int, host->bus_hz, priv->f_max); in snps_dwmmc_probe()
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| A D | sdhci.c | 793 u32 f_max, u32 f_min) argument
875 if (f_max && (f_max < host->max_clk))
876 cfg->f_max = f_max;
878 cfg->f_max = host->max_clk;
883 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
885 cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_200;
951 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min) argument
955 ret = sdhci_setup_cfg(&host->cfg, host, f_max, f_min);
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| A D | davinci_mmc.c | 55 if (clock > mmc->cfg->f_max)
56 clock = mmc->cfg->f_max;
465 host->cfg.f_max = 25000000;
511 cfg->f_max = 25000000;
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| A D | arm_pl180_mmci.c | 297 if (dev->clock >= dev->cfg->f_max) { in host_set_ios()
299 dev->clock = dev->cfg->f_max; in host_set_ios()
389 host->cfg.f_max = host->clock_max; in arm_pl180_mmci_init()
460 cfg->f_max = dev_read_u32_default(dev, "max-frequency", MMC_CLOCK_MAX); in arm_pl180_mmc_probe()
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| A D | pxa_mmc_gen.c | 338 tmp = mmc->cfg->f_max / mmc->clock; in pxa_mmc_set_ios_common()
404 .f_max = PXAMMC_MAX_SPEED,
471 cfg->f_max = PXAMMC_MAX_SPEED; in pxa_mmc_probe()
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| A D | omap_hsmmc.c | 1539 int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, argument
1598 if (f_max != 0)
1599 cfg->f_max = f_max;
1603 cfg->f_max = 52000000;
1605 cfg->f_max = 26000000;
1607 cfg->f_max = 20000000;
1923 if (!cfg->f_max)
1924 cfg->f_max = 52000000;
1941 cfg->f_max = fixups->max_freq;
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| A D | sandbox_mmc.c | 155 cfg->f_max = 52000000; in sandbox_mmc_bind()
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| A D | mmc_legacy.c | 175 cfg->f_max == 0 || cfg->b_max == 0) in mmc_create()
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| A D | jz_mmc.c | 404 .f_max = 48000000,
467 cfg->f_max = 52000000; in jz_mmc_of_to_plat()
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| A D | zynq_sdhci.c | 595 plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ; in arasan_sdhci_probe()
607 ret = sdhci_setup_cfg(&plat->cfg, host, plat->cfg.f_max, in arasan_sdhci_probe()
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| A D | gen_atmel_mci.c | 504 cfg->f_max = get_mci_clk_rate() / (2*1);
550 cfg->f_max = priv->bus_clk_rate / 2;
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| A D | sh_sdhi.c | 738 .f_max = CLKDEV_HS_DATA,
750 .f_max = CLKDEV_HS_DATA,
886 plat->cfg.f_max = CLKDEV_HS_DATA; in sh_sdhi_dm_probe()
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| A D | mxsmmc.c | 204 priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) in mxsmmc_initialize()
628 plat->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + priv->clkid) * 1000 / 2;
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| A D | sunxi_mmc.c | 532 cfg->f_max = 52000000; in sunxi_mmc_init()
635 cfg->f_max = 52000000; in sunxi_mmc_probe()
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| A D | meson_gx_mmc.c | 282 cfg->f_max = 100000000; /* 100 MHz */ in meson_mmc_probe()
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| A D | mvebu_mmc.c | 423 .f_max = MVEBU_MMC_CLOCKRATE_MAX,
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| A D | bcm2835_sdhost.c | 737 cfg->f_max = host->max_clk; in bcm2835_add_host()
742 cfg->f_max, cfg->f_min); in bcm2835_add_host()
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| A D | sh_mmcif.c | 630 sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk); in mmcif_mmc_init()
728 plat->cfg.f_max = MMC_CLK_DIV_MAX(host->clk); in sh_mmcif_dm_probe()
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| A D | mmc-uclass.c | 226 dev_read_u32(dev, "max-frequency", &cfg->f_max); in mmc_of_parse()
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| A D | mmc_spi.c | 471 plat->cfg.f_max = priv->spi->max_hz; in mmc_spi_probe()
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| A D | mxcmmc.c | 512 mxcmci_cfg.f_max = mxc_get_clock(MXC_ESDHC_CLK) >> 1; in mxcmci_initialize()
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| /u-boot/arch/arm/include/asm/ |
| A D | omap_mmc.h | 235 int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
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| /u-boot/include/ |
| A D | sdhci.h | 456 u32 f_max, u32 f_min);
486 int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min);
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| /u-boot/board/davinci/da8xxevm/ |
| A D | omapl138_lcdk.c | 376 .f_max = 25000000,
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| /u-boot/board/ti/am335x/ |
| A D | board.c | 971 .cfg.f_max = 52000000,
985 .cfg.f_max = 52000000,
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