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Searched refs:firccsr (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7ulp/
A Dscg.c30 reg = readl(&scg1_regs->firccsr); in scg_src_get_rate()
114 reg = readl(&scg1_regs->firccsr); in scg_fircdiv_get_rate()
965 while (!(readl(&scg1_regs->firccsr) & SCG_FIRC_CSR_FIRCVLD_MASK)) in scg_a7_firc_init()
/u-boot/arch/arm/include/asm/arch-mx7ulp/
A Dscg.h284 u32 firccsr; /* Fast IRC Control Status Register, offset 0x300 */ member

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