| /u-boot/drivers/ram/k3-j721e/ |
| A D | cps_drv_lpddr4.h | 37 #define CPS_FLD_MASK(fld) (fld ## _MASK) argument
38 #define CPS_FLD_SHIFT(fld) (fld ## _SHIFT) argument
39 #define CPS_FLD_WIDTH(fld) (fld ## _WIDTH) argument
40 #define CPS_FLD_WOCLR(fld) (fld ## _WOCLR) argument
41 #define CPS_FLD_WOSET(fld) (fld ## _WOSET) argument
50 #define CPS_FLD_READ(fld, reg_value) (cps_fldread((uint32_t)(CPS_FLD_MASK(fld)), \ argument
51 (uint32_t)(CPS_FLD_SHIFT(fld)), \
62 #define CPS_FLD_WRITE(fld, reg_value, value) (cps_fldwrite((uint32_t)(CPS_FLD_MASK(fld)), \ argument
73 #define CPS_FLD_SET(fld, reg_value) (cps_fldset((uint32_t)(CPS_FLD_WIDTH(fld)), \ argument
74 (uint32_t)(CPS_FLD_MASK(fld)), \
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| A D | k3-j721e-ddrss.c | 48 #define TH_MACRO_EXP(fld, str) (fld##str) argument
50 #define TH_FLD_MASK(fld) TH_MACRO_EXP(fld, _MASK) argument
51 #define TH_FLD_SHIFT(fld) TH_MACRO_EXP(fld, _SHIFT) argument
52 #define TH_FLD_WIDTH(fld) TH_MACRO_EXP(fld, _WIDTH) argument
53 #define TH_FLD_WOCLR(fld) TH_MACRO_EXP(fld, _WOCLR) argument
54 #define TH_FLD_WOSET(fld) TH_MACRO_EXP(fld, _WOSET) argument
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| /u-boot/tools/ |
| A D | ublimage.c | 73 char *name, int lineno, int fld, int dcd_len) in parse_cfg_cmd() argument
109 char *token, char *name, int lineno, int fld, int *dcd_len) in parse_cfg_fld() argument
112 switch (fld) { in parse_cfg_fld()
123 parse_cfg_cmd(ublhdr, *cmd, token, name, lineno, fld, *dcd_len); in parse_cfg_fld()
137 int fld; in parse_cfg_file() local
167 for (fld = CFG_COMMAND, cmd = CMD_INVALID, in parse_cfg_file()
168 line = token; ; line = NULL, fld++) { in parse_cfg_file()
178 lineno, fld, &dcd_len); in parse_cfg_file()
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| A D | imximage.c | 148 int fld, uint32_t value, uint32_t off) in set_dcd_val_v1() argument
152 switch (fld) { in set_dcd_val_v1()
242 int fld, uint32_t value, uint32_t off) in set_dcd_val_v2() argument
250 switch (fld) { in set_dcd_val_v2()
604 char *name, int lineno, int fld, int dcd_len) in parse_cfg_cmd() argument
690 switch (fld) { in parse_cfg_fld()
718 if (fld == CFG_REG_VALUE) { in parse_cfg_fld()
746 int fld; in parse_cfg_file() local
769 for (fld = CFG_COMMAND, cmd = CMD_INVALID, in parse_cfg_file()
770 line = token; ; line = NULL, fld++) { in parse_cfg_file()
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| A D | aisimage.c | 261 int fld; in aisimage_generate() local
302 fld = CFG_COMMAND; in aisimage_generate()
314 switch (fld) { in aisimage_generate()
340 fld = CFG_VALUE; in aisimage_generate()
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| A D | imx8mimage.c | 128 char *name, int lineno, int fld) in parse_cfg_fld() argument
130 switch (fld) { in parse_cfg_fld()
175 int fld; in parse_cfg_file() local
197 for (fld = CFG_COMMAND, cmd = CFG_INVALID, in parse_cfg_file()
198 line = token; ; line = NULL, fld++) { in parse_cfg_file()
207 parse_cfg_fld(&cmd, token, name, lineno, fld); in parse_cfg_file()
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| A D | imx8image.c | 141 char *name, int lineno, int fld) in parse_cfg_fld() argument
143 switch (fld) { in parse_cfg_fld()
238 int fld; in parse_cfg_file() local
260 for (fld = CFG_COMMAND, cmd = CFG_INVALID, in parse_cfg_file()
261 line = token; ; line = NULL, fld++) { in parse_cfg_file()
271 fld); in parse_cfg_file()
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| /u-boot/include/ |
| A D | gdsys_fpga.h | 26 #define FPGA_SET_REG(ix, fld, val) \ argument
28 &fpga_ptr[ix]->fld, \
29 offsetof(struct ihs_fpga, fld), \
32 #define FPGA_GET_REG(ix, fld, val) \ argument
34 &fpga_ptr[ix]->fld, \
35 offsetof(struct ihs_fpga, fld), \
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| A D | imximage.h | 206 int fld, uint32_t value,
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| /u-boot/board/gdsys/common/ |
| A D | osd.c | 42 #define OSD_SET_REG(screen, fld, val) \ argument
45 FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
47 FPGA_SET_REG(screen, osd0.fld, val); \
50 #define OSD_SET_REG(screen, fld, val) \ argument
51 FPGA_SET_REG(screen, osd0.fld, val)
55 #define OSD_GET_REG(screen, fld, val) \ argument
58 FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
60 FPGA_GET_REG(screen, osd0.fld, val); \
63 #define OSD_GET_REG(screen, fld, val) \ argument
64 FPGA_GET_REG(screen, osd0.fld, val)
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| /u-boot/drivers/i2c/ |
| A D | ihs_i2c.c | 47 #define I2C_SET_REG(fld, val) \ argument
50 FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
52 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
55 #define I2C_SET_REG(fld, val) \ argument
56 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
60 #define I2C_GET_REG(fld, val) \ argument
63 FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
65 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
68 #define I2C_GET_REG(fld, val) \ argument
69 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
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| /u-boot/scripts/coccinelle/null/ |
| A D | kmerr.cocci | 25 identifier f,fld;
29 ... when != x->fld
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| /u-boot/drivers/net/ti/ |
| A D | cpsw.c | 188 #define desc_write(desc, fld, val) __raw_writel((u32)(val), &(desc)->fld) argument
189 #define desc_read(desc, fld) __raw_readl(&(desc)->fld) argument
190 #define desc_read_ptr(desc, fld) ((void *)__raw_readl(&(desc)->fld)) argument
192 #define chan_write(chan, fld, val) __raw_writel((u32)(val), (chan)->fld) argument
193 #define chan_read(chan, fld) __raw_readl((chan)->fld) argument
194 #define chan_read_ptr(chan, fld) ((void *)__raw_readl((chan)->fld)) argument
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