Searched refs:gates (Results 1 – 25 of 25) sorted by relevance
| /u-boot/drivers/clk/meson/ |
| A D | g12a-ao.c | 21 static struct meson_gate gates[] = { variable
31 if (clk->id >= ARRAY_SIZE(gates)) in meson_set_gate()
34 gate = &gates[clk->id]; in meson_set_gate()
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| A D | axg.c | 30 static struct meson_gate gates[] = { variable
59 if (clk->id >= ARRAY_SIZE(gates)) in meson_set_gate()
62 gate = &gates[clk->id]; in meson_set_gate()
271 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
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| A D | gxbb.c | 87 static struct meson_gate gates[] = { variable
215 if (id >= ARRAY_SIZE(gates)) in meson_set_gate_by_id()
218 gate = &gates[id]; in meson_set_gate_by_id()
788 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
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| A D | g12a.c | 112 static struct meson_gate gates[NUM_CLKS] = { variable
162 if (id >= ARRAY_SIZE(gates)) in meson_set_gate_by_id()
165 gate = &gates[id]; in meson_set_gate_by_id()
848 if (gates[id].reg != 0) { in meson_clk_get_rate_by_id()
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| /u-boot/drivers/clk/sunxi/ |
| A D | clk_a80.c | 66 .gates = a80_gates,
71 .gates = a80_mmc_gates,
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| A D | clk_v3s.c | 47 .gates = v3s_gates,
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| A D | clk_a10s.c | 48 .gates = a10s_gates,
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| A D | clk_sunxi.c | 21 return &priv->desc->gates[id]; in priv_to_gate()
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| A D | clk_a10.c | 61 .gates = a10_gates,
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| A D | clk_a23.c | 64 .gates = a23_gates,
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| A D | clk_a64.c | 71 .gates = a64_gates,
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| A D | clk_a83t.c | 68 .gates = a83t_gates,
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| A D | clk_h6.c | 79 .gates = h6_gates,
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| A D | clk_a31.c | 83 .gates = a31_gates,
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| A D | clk_h3.c | 84 .gates = h3_gates,
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| A D | clk_h616.c | 97 .gates = h616_gates,
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| A D | clk_r40.c | 91 .gates = r40_gates,
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| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| A D | ccu.h | 68 const struct ccu_clk_gate *gates; member
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| /u-boot/doc/device-tree-bindings/clock/ |
| A D | rockchip.txt | 13 structure a matter of taste, as either all gates can be put into
15 the 10 individual gates containing 16 clocks each.
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| /u-boot/drivers/clk/mediatek/ |
| A D | clk-mtk.h | 210 const struct mtk_gate *gates; member
221 const struct mtk_gate *gates);
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| A D | clk-mtk.c | 418 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_enable()
445 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_disable()
472 const struct mtk_gate *gate = &priv->gates[clk->id]; in mtk_clk_gate_get_rate()
525 const struct mtk_gate *gates) in mtk_common_clk_gate_init() argument
534 priv->gates = gates; in mtk_common_clk_gate_init()
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| /u-boot/board/tbs/tbs2910/ |
| A D | tbs2910.cfg | 15 /* set the default clock gates to save power */
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| /u-boot/arch/arm/dts/ |
| A D | sun8i-a23-a33.dtsi | 593 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
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| A D | sun9i-a80.dtsi | 214 compatible = "allwinner,sun9i-a80-apbs-gates-clk";
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| A D | sun6i-a31.dtsi | 1295 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
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