Searched refs:hws_ddr_phy (Results 1 – 6 of 6) sorted by relevance
| /u-boot/drivers/ddr/marvell/a38x/ |
| A D | ddr3_training_ip_prv_if.h | 49 enum hws_ddr_phy phy_type, u32 reg_addr, u32 data);
52 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data);
101 u32 phy, enum hws_ddr_phy phy_type,
104 u32 phy, enum hws_ddr_phy phy_type,
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| A D | ddr3_training_ip_flow.h | 77 enum hws_ddr_phy phy_type,
80 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr,
84 enum hws_ddr_phy e_phy_type, u32 reg_addr,
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| A D | ddr3_training_ip_def.h | 121 enum hws_ddr_phy { enum
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| A D | mv_ddr_plat.c | 589 enum hws_ddr_phy phy_type, u32 addr, in prfa_write()
612 enum hws_ddr_phy phy_type, u32 addr, u32 *data) in prfa_read()
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| A D | ddr3_training.c | 1070 enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data) in ddr3_tip_bus_read()
1081 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, in ddr3_tip_bus_write()
1094 enum hws_ddr_phy phy_type, u32 reg_addr, in ddr3_tip_bus_read_modify_write()
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| A D | ddr3_training_leveling.c | 1674 enum hws_ddr_phy subphy_type = DDR_PHY_DATA; in mv_ddr_rl_dqs_burst()
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