Searched refs:ifc_in32 (Results 1 – 3 of 3) sorted by relevance
60 ver = ifc_in32(®s.gregs->ifc_rev); in runtime_regs_address()81 status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); in nand_wait()91 eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]); in nand_wait()154 ver = ifc_in32(&gregs->ifc_rev); in nand_spl_load_image()
279 ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); in fsl_ifc_run_command()300 eccstat = ifc_in32(&eccstat_regs[sector_start / 4]); in fsl_ifc_run_command()304 eccstat = ifc_in32(&eccstat_regs[i / 4]); in fsl_ifc_run_command()701 nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr); in fsl_ifc_wait()780 ver = ifc_in32(&ifc_ctrl->regs.gregs->ifc_rev); in fsl_ifc_ctrl_init()815 ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr); in fsl_ifc_sram_init()822 ifc_in32(&ifc->ifc_nand.nand_evter_stat); in fsl_ifc_sram_init()834 csor = ifc_in32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor); in fsl_ifc_sram_init()915 cspr = ifc_in32(&gregs->cspr_cs[priv->bank].cspr); in fsl_ifc_chip_init()916 csor = ifc_in32(&gregs->csor_cs[priv->bank].csor); in fsl_ifc_chip_init()[all …]
22 #define ifc_in32(a) in_le32(a) macro27 #define ifc_in32(a) in_be32(a) macro807 (ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr_ext))809 (ifc_in32(&(IFC_FCM_BASE_ADDR)->cspr_cs[i].cspr))811 (ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor_ext))813 (ifc_in32(&(IFC_FCM_BASE_ADDR)->csor_cs[i].csor))815 (ifc_in32(&(IFC_FCM_BASE_ADDR)->amask_cs[i].amask))817 (ifc_in32(&(IFC_FCM_BASE_ADDR)->ftim_cs[i].ftim[j]))
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