| /u-boot/arch/x86/cpu/broadwell/ |
| A D | power_state.c | 70 ps->pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); in power_state_get()
73 ps->gpe0_sts[0] = inl(ACPI_BASE_ADDRESS + GPE0_STS(0)); in power_state_get()
74 ps->gpe0_sts[1] = inl(ACPI_BASE_ADDRESS + GPE0_STS(1)); in power_state_get()
75 ps->gpe0_sts[2] = inl(ACPI_BASE_ADDRESS + GPE0_STS(2)); in power_state_get()
76 ps->gpe0_sts[3] = inl(ACPI_BASE_ADDRESS + GPE0_STS(3)); in power_state_get()
77 ps->gpe0_en[0] = inl(ACPI_BASE_ADDRESS + GPE0_EN(0)); in power_state_get()
78 ps->gpe0_en[1] = inl(ACPI_BASE_ADDRESS + GPE0_EN(1)); in power_state_get()
79 ps->gpe0_en[2] = inl(ACPI_BASE_ADDRESS + GPE0_EN(2)); in power_state_get()
80 ps->gpe0_en[3] = inl(ACPI_BASE_ADDRESS + GPE0_EN(3)); in power_state_get()
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| /u-boot/board/intel/galileo/ |
| A D | galileo.c | 31 val = inl(port); in board_assert_perst()
37 val = inl(port); in board_assert_perst()
43 val = inl(port); in board_assert_perst()
58 val = inl(port); in board_deassert_perst()
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| /u-boot/drivers/gpio/ |
| A D | intel_ich6_gpio.c | 67 val = inl(bank->lvl); in _ich6_gpio_set_value()
85 val = inl(base); in _ich6_gpio_set_direction()
89 val = inl(base); in _ich6_gpio_set_direction()
156 tmplong = inl(bank->use_sel); in ich6_gpio_request()
192 tmplong = inl(bank->lvl); in ich6_gpio_get_value()
211 if (!(inl(bank->use_sel) & mask)) in ich6_gpio_get_function()
213 if (inl(bank->io_sel) & mask) in ich6_gpio_get_function()
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| A D | intel_broadwell_gpio.c | 50 val = inl(®s->own[priv->bank]); in broadwell_gpio_request()
75 return inl(®s->config[priv->offset + offset]) & CONFA_LEVEL_HIGH ? in broadwell_gpio_get_value()
111 if (!(inl(®s->own[priv->bank]) & mask)) in broadwell_gpio_get_function()
113 if (inl(®s->config[priv->offset + offset]) & CONFA_DIR_INPUT) in broadwell_gpio_get_function()
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| /u-boot/drivers/pci/ |
| A D | pci_sh7751.c | 201 p4_out(inl(SH7751_BCR1) | 0x00080000, SH7751_BCR1); in sh7751_pci_probe()
204 p4_out(inl(SH7751_BCR1), SH7751_PCIBCR1); in sh7751_pci_probe()
207 p4_out(inl(SH7751_WCR1), SH7751_PCIWCR1); in sh7751_pci_probe()
208 p4_out(inl(SH7751_WCR2), SH7751_PCIWCR2); in sh7751_pci_probe()
209 p4_out(inl(SH7751_WCR3), SH7751_PCIWCR3); in sh7751_pci_probe()
210 p4_out(inl(SH7751_MCR), SH7751_PCIMCR); in sh7751_pci_probe()
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| /u-boot/arch/sh/cpu/sh4/ |
| A D | cache.c | 27 data = inl(addr); in cache_wback_all()
44 ccr = inl(CCR); in cache_control()
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| /u-boot/arch/microblaze/include/asm/ |
| A D | io.h | 48 #define inl(addr) readl(addr) macro
76 #define inl_p(port) inl((port))
109 *p++ = inl(port); in io_insl()
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| /u-boot/arch/xtensa/include/asm/ |
| A D | io.h | 63 #define inl(port) readl((u32 *)((port))) macro
70 #define inl_p(port) inl((port))
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| /u-boot/drivers/net/ |
| A D | uli526x.c | 343 if (!((inl(db->ioaddr + DCR12)) & 0x8)) { in uli526x_disable()
353 outl(inl(dev->iobase + DCR5), dev->iobase + DCR5); in uli526x_disable()
400 if (!(inl(db->ioaddr + DCR12) & 0x8)) { in uli526x_init()
432 while (!(inl(db->ioaddr + DCR12) & 0x8)) in uli526x_init()
477 db->cr5_data = inl(db->ioaddr + DCR5); in uli526x_start_xmit()
758 srom_data = (srom_data << 1) | ((inl(cr9_ioaddr) & CR9_CRDOUT) in read_srom_word()
918 cr10_value = inl(ioaddr); in phy_readby_cr10()
961 phy_data = (inl(ioaddr) >> 19) & 0x1; in phy_read_1bit()
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| A D | sh_eth.h | 23 #ifndef inl
24 #define inl readl macro
677 return inl(sh_eth_reg_addr(port, enum_index)); in sh_eth_read()
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| /u-boot/arch/sh/include/asm/ |
| A D | io.h | 90 #define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; }) macro
105 #define inl_p(port) inl((port))
120 #define in_le32(port) inl(port)
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| /u-boot/arch/x86/cpu/ |
| A D | pci.c | 32 *valuep = inl(PCI_REG_DATA); in pci_x86_read_config()
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| A D | acpi_gpe.c | 46 sts = inl(priv->acpi_base + GPE0_STS(bank)); in acpi_gpe_read_and_clear()
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| /u-boot/drivers/power/acpi_pmc/ |
| A D | acpi-pmc-uclass.c | 99 upriv->gpe0_sts[i] = inl(upriv->acpi_base + GPE0_STS + i * 4); in pmc_fill_pm_reg_info()
100 upriv->gpe0_en[i] = inl(upriv->acpi_base + GPE0_EN + i * 4); in pmc_fill_pm_reg_info()
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| /u-boot/cmd/ |
| A D | io.c | 75 *(u32 *)ptr = inl(addr + i); in do_io_iod()
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| /u-boot/drivers/sysreset/ |
| A D | sysreset_x86.c | 57 reg32 = inl(pm.base + pm.pm1_cnt_ofs); in pch_sysreset_power_off()
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| /u-boot/arch/x86/include/asm/arch-quark/ |
| A D | quark.h | 212 *valuep = inl(PCI_REG_DATA); in qrk_pci_read_config_dword()
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| /u-boot/arch/x86/cpu/baytrail/ |
| A D | acpi.c | 186 pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); in chipset_prev_sleep_state()
205 pm1_cnt = inl(ACPI_BASE_ADDRESS + PM1_CNT); in chipset_clear_sleep_state()
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| /u-boot/arch/nios2/include/asm/ |
| A D | io.h | 77 #define inl(addr) readl(addr) macro
95 while (count--) *p++ = inl (port); in insl()
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| /u-boot/drivers/bios_emulator/include/ |
| A D | x86emu.h | 92 u32(X86APIP inl) (X86EMU_pioAddr addr);
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| /u-boot/arch/x86/cpu/ivybridge/ |
| A D | cpu.c | 159 pm1_cnt = inl(DEFAULT_PMBASE + PM1_CNT); in checkcpu()
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| /u-boot/arch/m68k/include/asm/ |
| A D | io.h | 58 #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) macro
63 #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) macro
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| /u-boot/drivers/bios_emulator/ |
| A D | biosemui.h | 133 #define PM_inpd(port) inl(port+VIDEO_IO_OFFSET)
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| /u-boot/drivers/bios_emulator/x86emu/ |
| A D | sys.c | 270 sys_inl = funcs->inl; in X86EMU_setupPioFuncs()
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| /u-boot/include/ |
| A D | usbdevice.h | 65 #ifndef inl
66 #define inl(p) (*(volatile u32*)(p)) macro
|