Searched refs:internal (Results 1 – 25 of 232) sorted by relevance
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/u-boot/doc/api/ |
A D | efi.rst | 25 :internal: 45 :internal: 55 :internal: 61 :internal: 67 :internal: 73 :internal: 79 :internal: 85 :internal: 91 :internal: 97 :internal: [all …]
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A D | rng.rst | 11 :internal: 17 :internal:
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A D | unicode.rst | 7 :internal:
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A D | serial.rst | 7 :internal:
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A D | dfu.rst | 7 :internal:
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A D | pinctrl.rst | 7 :internal:
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A D | getopt.rst | 8 :internal:
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A D | timer.rst | 8 :internal:
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A D | sandbox.rst | 9 :internal:
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/u-boot/arch/arm/dts/ |
A D | dra72-evm-revc.dts | 78 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 79 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 89 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 90 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
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A D | zynqmp-zcu102-revB.dts | 21 ti,rx-internal-delay = <0x8>; 22 ti,tx-internal-delay = <0xa>;
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A D | armada-xp-gp-u-boot.dtsi | 5 internal-regs {
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A D | meson-gxl-s905x.dtsi | 14 /* S905X only has access to its internal PHY */
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/u-boot/doc/device-tree-bindings/remoteproc/ |
A D | remoteproc.txt | 11 - remoteproc-internal-memory-mapped: a bool, indicates that the remote 12 processor has internal memory that it uses to execute code and store
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/u-boot/arch/mips/dts/ |
A D | nexys4ddr.dts | 32 xlnx,include-internal-loopback = <0x0>; 38 xlnx,use-internal = <0x0>;
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/u-boot/board/microchip/pic32mzda/ |
A D | README | 11 This processor boots with proprietary stage1 bootloader running from internal 13 on internal program-flash. Finally U-Boot loads OS image (along with other
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/u-boot/board/congatec/conga-qeval20-qa3-e3845/ |
A D | README | 16 conga-qeval20-qa3-e3845-internal-uart_defconfig 18 provides the U-Boot console on the BayTrail internal legacy UART,
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/u-boot/drivers/video/imx/ |
A D | Kconfig | 7 on the IPUv3(Image Processing Unit) internal graphic processor.
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/u-boot/arch/x86/include/asm/arch-baytrail/acpi/ |
A D | global_nvs.asl | 12 IURE, 8, /* internal UART enabled */
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/u-boot/fs/yaffs2/ |
A D | yaffs_allocator.c | 129 curr->internal[0] = next; in yaffs_create_tnodes() 133 curr->internal[0] = allocator->free_tnodes; in yaffs_create_tnodes() 176 allocator->free_tnodes = allocator->free_tnodes->internal[0]; in yaffs_alloc_raw_tnode() 194 tn->internal[0] = allocator->free_tnodes; in yaffs_free_raw_tnode()
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/u-boot/doc/ |
A D | README.nokia_rx51 | 6 internal eMMC memory via twl4030 regulator which is not enabled by NOLO. 15 SD card or internal eMMC memory. If this fails or keyboard is closed then 36 * 2. try boot from internal eMMC memory 52 * run emmcboot - Boot from internal eMMC memory (see boot order) 69 * mmc ${mmcnum} (0 - external, 1 - internal)
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/u-boot/doc/device-tree-bindings/net/ |
A D | ethernet.txt | 21 * "internal" 30 * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the 32 * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC 34 * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
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/u-boot/board/keymile/km_arm/ |
A D | kwbimage_128M16_1.cfg | 199 # bit 15-12: 4, internal ODT time based on bit 7-4 200 # with the considered SDRAM internal delay 201 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8 202 # with the considered SDRAM internal delay 208 # bit 11-8: 4, internal ODT assertion 2 cycles after write start command 209 # with the considered SDRAM internal delay 210 # bit 15-12: 8, internal ODT de-assertion 5 cycles after write start command 211 # with the considered SDRAM internal delay
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A D | kwbimage_256M8_1.cfg | 199 # bit 15-12: 4, internal ODT time based on bit 7-4 200 # with the considered SDRAM internal delay 201 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8 202 # with the considered SDRAM internal delay 208 # bit 11-8: 4, internal ODT assertion 2 cycles after write start command 209 # with the considered SDRAM internal delay 210 # bit 15-12: 8, internal ODT de-assertion 5 cycles after write start command 211 # with the considered SDRAM internal delay
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/u-boot/board/buffalo/lsxl/ |
A D | kwbimage-lschl.cfg | 141 # bit15-12: 5, 5 cycles from read command to assertion of internal ODT signal 142 # bit19-16: 8, 8 cycles from read command to de-assertion of internal ODT signal 149 # bit15-12: 5, 5 cycles from write command to assertion of internal ODT signal 150 # bit19-16: 8, 8 cycles from write command to de-assertion of internal ODT signal 194 # bit3-0: 0b1111, internal ODT is asserted during read from DRAM bank 0-3 195 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-3
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