Home
last modified time | relevance | path

Searched refs:iobase (Results 1 – 25 of 92) sorted by relevance

1234

/u-boot/drivers/net/
A Dravb.c131 void __iomem *iobase; member
354 eth->iobase + RAVB_REG_MAHR); in ravb_write_hwaddr()
386 writel(0, eth->iobase + RAVB_REG_RIC0); in ravb_dmac_init()
387 writel(0, eth->iobase + RAVB_REG_RIC1); in ravb_dmac_init()
388 writel(0, eth->iobase + RAVB_REG_RIC2); in ravb_dmac_init()
389 writel(0, eth->iobase + RAVB_REG_TIC); in ravb_dmac_init()
482 void __iomem *iobase; in ravb_probe() local
485 iobase = map_physmem(pdata->iobase, 0x1000, MAP_NOCACHE); in ravb_probe()
486 eth->iobase = iobase; in ravb_probe()
540 unmap_physmem(eth->iobase, MAP_NOCACHE); in ravb_probe()
[all …]
A Dsmc91111.h75 unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \
81 #define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r))))
82 #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r))))
84 unsigned int __p = (unsigned int)((a)->iobase + (p)); \
219 #define SMC_inw(a, r) *((volatile word*)((a)->iobase + (r)))
259 #define SMC_inw(a, r) (*((volatile word*)((a)->iobase+(r))))
267 (*((volatile word*)((a)->iobase+((dword)(r)))) = d)
270 (*((volatile word*)((a)->iobase+(r))) = d)
279 #define SMC_outsw(a,r,b,l) outsw((a)->iobase+(r), (b), (l))
291 #define SMC_insw(a,r,b,l) insw((a)->iobase+(r), (b), (l))
[all …]
A Dsni_ave.c144 phys_addr_t iobase; member
191 return readl(priv->iobase + addr); in ave_desc_read()
215 writel(val, priv->iobase + addr); in ave_desc_write()
288 priv->iobase + AVE_MDIOCTR); in ave_mdiobus_write()
422 val = readl(priv->iobase + AVE_GRR); in ave_stop()
430 writel(0, priv->iobase + AVE_DESCC); in ave_stop()
459 writel(0, priv->iobase + AVE_GRR); in ave_reset()
508 priv->iobase + AVE_RXCR); in ave_start()
524 priv->iobase + AVE_RXMAC1R); in ave_write_hwaddr()
750 pdata->iobase = dev_read_addr(dev); in ave_of_to_plat()
[all …]
A Dpcnet.c93 void __iomem *iobase; member
108 writew(index, lp->iobase + PCNET_RAP); in pcnet_read_csr()
109 return readw(lp->iobase + PCNET_RDP); in pcnet_read_csr()
115 writew(val, lp->iobase + PCNET_RDP); in pcnet_write_csr()
121 return readw(lp->iobase + PCNET_BDP); in pcnet_read_bcr()
127 writew(val, lp->iobase + PCNET_BDP); in pcnet_write_bcr()
132 readw(lp->iobase + PCNET_RESET); in pcnet_reset()
137 writew(88, lp->iobase + PCNET_RAP); in pcnet_check()
644 u32 iobase; in pcnet_probe() local
648 iobase &= ~0xf; in pcnet_probe()
[all …]
A Dftmac100.c31 phys_addr_t iobase; member
39 struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; in ftmac100_reset()
60 struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; in ftmac100_set_mac()
75 struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; in _ftmac100_halt()
85 struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; in _ftmac100_init()
190 struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase; in _ftmac100_send()
301 dev->iobase = CONFIG_FTMAC100_BASE; in ftmac100_initialize()
307 priv->iobase = dev->iobase; in ftmac100_initialize()
402 pdata->iobase = dev_read_addr(dev); in ftmac100_of_to_plat()
403 priv->iobase = pdata->iobase; in ftmac100_of_to_plat()
A Duli526x.c210 u32 iobase; in uli526x_initialize() local
220 iobase &= ~0xf; in uli526x_initialize()
234 dev->iobase = iobase; in uli526x_initialize()
242 db->ioaddr = dev->iobase; in uli526x_initialize()
351 update_cr6(db->cr6_data, dev->iobase); in uli526x_disable()
353 outl(inl(dev->iobase + DCR5), dev->iobase + DCR5); in uli526x_disable()
459 outl(0, dev->iobase + DCR7); in uli526x_start_xmit()
823 ioaddr = iobase + DCR9; in uli_phy_write()
871 ioaddr = iobase + DCR9; in uli_phy_read()
911 ioaddr = iobase + DCR10; in phy_readby_cr10()
[all …]
A Drtl8169.c331 ulong iobase; member
598 dev->iobase, NULL); in rtl_recv()
907 dev->enetaddr, dev->iobase); in rtl_reset()
941 rtl_halt_common(priv->iobase); in rtl8169_eth_stop()
949 rtl_halt_common(dev->iobase); in rtl_halt()
1127 u32 iobase; in rtl8169_initialize() local
1151 iobase &= ~0xf; in rtl8169_initialize()
1165 dev->iobase = (int)pci_mem_to_phys(devno, iobase); in rtl8169_initialize()
1193 u32 iobase; in rtl8169_eth_probe() local
1207 iobase &= ~0xf; in rtl8169_eth_probe()
[all …]
A Dat91_emac.c160 return (at91_emac_t *) netdev->iobase; in get_emacbase_by_name()
192 emac = (at91_emac_t *) netdev->iobase; in at91emac_phy_reset()
227 emac = (at91_emac_t *) netdev->iobase; in at91emac_phy_init()
326 emac = (at91_emac_t *) netdev->iobase; in at91emac_init()
388 emac = (at91_emac_t *) netdev->iobase; in at91emac_halt()
398 emac = (at91_emac_t *) netdev->iobase; in at91emac_send()
418 emac = (at91_emac_t *) netdev->iobase; in at91emac_recv()
456 emac = (at91_emac_t *) netdev->iobase; in at91emac_write_hwaddr()
479 if (iobase == 0) in at91emac_register()
480 iobase = ATMEL_BASE_EMAC; in at91emac_register()
[all …]
A Dax88180.h358 return le16_to_cpu(readw(addr + (void *)dev->iobase)); in INW()
367 writew(cpu_to_le16(command), addr + (void *)dev->iobase); in OUTW()
372 return le16_to_cpu(readw(RXBUFFER_START + (void *)dev->iobase)); in READ_RXBUF()
377 writew(cpu_to_le16(data), TXBUFFER_START + (void *)dev->iobase); in WRITE_TXBUF()
382 writel(cpu_to_le32(command), addr + (void *)dev->iobase); in OUTW()
387 return le32_to_cpu(readl(RXBUFFER_START + (void *)dev->iobase)); in READ_RXBUF()
392 writel(cpu_to_le32(data), TXBUFFER_START + (void *)dev->iobase); in WRITE_TXBUF()
A Dftgmac100.c79 struct ftgmac100 *iobase; member
106 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_mdio_read()
135 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_mdio_write()
187 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_phy_adjust_link()
245 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_reset()
261 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_set_mac()
279 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_get_mac()
301 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_stop()
314 struct ftgmac100 *ftgmac100 = priv->iobase; in ftgmac100_start()
550 pdata->iobase = dev_read_addr(dev); in ftgmac100_of_to_plat()
[all …]
A Dks8851_mll.c34 phys_addr_t iobase; member
51 writew(offset | (BE0 << shift_bit), ks->iobase + 2); in ks_rdreg8()
53 return (u8)(readw(ks->iobase) >> shift_data); in ks_rdreg8()
58 writew(offset | ((BE1 | BE0) << (offset & 0x02)), ks->iobase + 2); in ks_rdreg16()
60 return readw(ks->iobase); in ks_rdreg16()
66 writew(val, ks->iobase); in ks_wrreg16()
81 *wptr++ = readw(ks->iobase); in ks_inblk()
95 writew(*wptr++, ks->iobase); in ks_outblk()
559 ks->iobase = base_addr; in ks8851_mll_initialize()
674 pdata->iobase = dev_read_addr(dev); in ks8851_of_to_plat()
[all …]
A Dsmc911x.c28 phys_addr_t iobase; member
60 return readl(priv->iobase + offset); in smc911x_reg_read()
65 writel(val, priv->iobase + offset); in smc911x_reg_write()
70 return (readw(priv->iobase + offset) & 0xffff) | in smc911x_reg_read()
71 (readw(priv->iobase + offset + 2) << 16); in smc911x_reg_read()
75 writew(val & 0xffff, priv->iobase + offset); in smc911x_reg_write()
76 writew(val >> 16, priv->iobase + offset + 2); in smc911x_reg_write()
501 priv->iobase = base_addr; in smc911x_initialize()
502 priv->dev.iobase = base_addr; in smc911x_initialize()
615 pdata->iobase = dev_read_addr(dev); in smc911x_of_to_plat()
[all …]
A Ddc2114x.c113 void __iomem *iobase; member
120 return le32_to_cpu(readl(priv->iobase + addr)); in dc2114x_inl()
125 writel(cpu_to_le32(command), priv->iobase + addr); in dc2114x_outl()
551 unsigned int iobase; in dc21x4x_initialize() local
586 iobase &= PCI_BASE_ADDRESS_MEM_MASK; in dc21x4x_initialize()
603 dev->iobase = pci_mem_to_phys(devbusfn, iobase); in dc21x4x_initialize()
715 u32 iobase; in dc2114x_probe() local
717 dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); in dc2114x_probe()
718 iobase &= ~0xf; in dc2114x_probe()
720 debug("dc2114x: DEC 2114x PCI Device @0x%x\n", iobase); in dc2114x_probe()
[all …]
A Deepro100.c216 void __iomem *iobase; member
233 return le16_to_cpu(readw(addr + priv->iobase)); in INW()
238 writew(cpu_to_le16(command), addr + priv->iobase); in OUTW()
249 return le32_to_cpu(readl(addr + priv->iobase)); in INL()
827 u32 iobase, status; in eepro100_initialize() local
839 iobase &= ~0xf; in eepro100_initialize()
842 iobase); in eepro100_initialize()
870 priv->iobase = (void __iomem *)bus_to_phys(devno, iobase); in eepro100_initialize()
968 u32 iobase; in eepro100_probe() local
972 iobase &= ~0xf; in eepro100_probe()
[all …]
/u-boot/drivers/ata/
A Dsata_sil3114.c374 u32 port = iobase[5]; in wait_for_irq()
665 if ((iobase[0] == 0xFFFFFFFF) || (iobase[1] == 0xFFFFFFFF) || in init_sata()
666 (iobase[2] == 0xFFFFFFFF) || (iobase[3] == 0xFFFFFFFF) || in init_sata()
667 (iobase[4] == 0xFFFFFFFF) || (iobase[5] == 0xFFFFFFFF)) { in init_sata()
674 iobase[0] &= 0xfffffffc; in init_sata()
675 iobase[1] &= 0xfffffff8; in init_sata()
676 iobase[2] &= 0xfffffffc; in init_sata()
677 iobase[3] &= 0xfffffff8; in init_sata()
678 iobase[4] &= 0xfffffff0; in init_sata()
716 u32 port = iobase[5]; in sata_bus_probe()
[all …]
/u-boot/drivers/misc/
A Dsmsc_sio1007.c29 void sio1007_enable_serial(int port, int num, int iobase, int irq) in sio1007_enable_serial() argument
40 sio1007_clrsetbits(port, UART1_IOBASE, 0xfe, iobase >> 2); in sio1007_enable_serial()
44 sio1007_clrsetbits(port, UART2_IOBASE, 0xfe, iobase >> 2); in sio1007_enable_serial()
52 void sio1007_enable_runtime(int port, int iobase) in sio1007_enable_runtime() argument
58 sio1007_clrsetbits(port, RTR_IOBASE_LOW, 0, iobase >> 4); in sio1007_enable_runtime()
59 sio1007_clrsetbits(port, RTR_IOBASE_HIGH, 0, iobase >> 12); in sio1007_enable_runtime()
A Dwinbond_w83627.c31 void winbond_enable_serial(uint dev, uint iobase, uint irq) in winbond_enable_serial() argument
36 pnp_set_iobase(dev, PNP_IDX_IO0, iobase); in winbond_enable_serial()
A Dsmsc_lpc47m.c24 void lpc47m_enable_serial(uint dev, uint iobase, uint irq) in lpc47m_enable_serial() argument
29 pnp_set_iobase(dev, PNP_IDX_IO0, iobase); in lpc47m_enable_serial()
/u-boot/drivers/spi/
A Dnxp_fspi.c333 void __iomem *iobase; member
462 reg = fspi_readl(f, f->iobase + FSPI_MCR0); in nxp_fspi_invalid()
474 void __iomem *base = f->iobase; in nxp_fspi_prepare_lut()
625 void __iomem *base = f->iobase; in nxp_fspi_fill_txfifo()
669 void __iomem *base = f->iobase; in nxp_fspi_read_rxfifo()
719 void __iomem *base = f->iobase; in nxp_fspi_do_op()
816 void __iomem *base = f->iobase; in nxp_fspi_default_setup()
855 reg = fspi_readl(f, f->iobase + FSPI_MCR2); in nxp_fspi_default_setup()
940 fdt_addr_t iobase; in nxp_fspi_of_to_plat() local
948 if (iobase == FDT_ADDR_T_NONE) { in nxp_fspi_of_to_plat()
[all …]
A Dfsl_qspi.c273 void __iomem *iobase; member
411 void __iomem *base = q->iobase; in fsl_qspi_prepare_lut()
495 reg = qspi_readl(q, q->iobase + QUADSPI_MCR); in fsl_qspi_invalidate()
497 qspi_writel(q, reg, q->iobase + QUADSPI_MCR); in fsl_qspi_invalidate()
550 void __iomem *base = q->iobase; in fsl_qspi_fill_txfifo()
575 void __iomem *base = q->iobase; in fsl_qspi_read_rxfifo()
606 void __iomem *base = q->iobase; in fsl_qspi_do_op()
633 void __iomem *base = q->iobase; in fsl_qspi_exec_op()
708 void __iomem *base = q->iobase; in fsl_qspi_default_setup()
743 q->iobase + QUADSPI_BFGENCR); in fsl_qspi_default_setup()
[all …]
/u-boot/arch/x86/lib/
A Dpinctrl_ich6.c63 static int ich6_pinctrl_cfg_pin(s32 gpiobase, s32 iobase, int pin_node) in ich6_pinctrl_cfg_pin() argument
107 if (iobase != -1) { in ich6_pinctrl_cfg_pin()
122 iobase_addr = iobase + pad_offset; in ich6_pinctrl_cfg_pin()
160 u32 iobase = -1; in ich6_pinctrl_probe() local
185 ret = pch_get_io_base(pch, &iobase); in ich6_pinctrl_probe()
187 debug("%s: invalid IOBASE address (%08x)\n", __func__, iobase); in ich6_pinctrl_probe()
195 ret = ich6_pinctrl_cfg_pin(gpiobase, iobase, pin_node); in ich6_pinctrl_probe()
/u-boot/test/dm/
A Dpch.c18 u32 gbase, iobase; in dm_test_pch_base() local
32 ut_assertok(pch_get_io_base(dev, &iobase)); in dm_test_pch_base()
33 ut_asserteq(0x30, iobase); in dm_test_pch_base()
/u-boot/arch/x86/include/asm/
A Dpnp_def.h67 static inline void pnp_set_iobase(uint16_t dev, uint8_t index, uint16_t iobase) in pnp_set_iobase() argument
69 pnp_write_config(dev, index + 0, (iobase >> 8) & 0xff); in pnp_set_iobase()
70 pnp_write_config(dev, index + 1, iobase & 0xff); in pnp_set_iobase()
/u-boot/include/
A Dsmsc_sio1007.h72 void sio1007_enable_serial(int port, int num, int iobase, int irq);
81 void sio1007_enable_runtime(int port, int iobase);
/u-boot/drivers/clk/
A Dclk_pic32.c91 void __iomem *iobase; member
100 v = readl(priv->iobase + SPLLCON); in pic32_get_pll_rate()
126 v = readl(priv->iobase + OSCCON); in pic32_get_sysclk()
162 reg = priv->iobase + PB1DIV + (periph - PB1CLK) * 0x10; in pic32_get_pbclk()
197 reg = priv->iobase + REFO1CON + (periph - REF1CLK) * 0x20; in pic32_set_refclk()
241 reg = priv->iobase + REFO1CON + (periph - REF1CLK) * 0x20; in pic32_get_refclk()
404 priv->iobase = ioremap(addr, size); in pic32_clk_probe()
405 if (!priv->iobase) in pic32_clk_probe()

Completed in 57 milliseconds

1234