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/u-boot/arch/arm/cpu/armv8/
A Dcache_v8.c45 u64 ips, va_bits; in get_tcr() local
55 ips = 5; in get_tcr()
58 ips = 4; in get_tcr()
61 ips = 3; in get_tcr()
64 ips = 2; in get_tcr()
67 ips = 1; in get_tcr()
70 ips = 0; in get_tcr()
75 tcr = TCR_EL1_RSVD | (ips << 32) | TCR_EPD1_DISABLE; in get_tcr()
77 tcr = TCR_EL2_RSVD | (ips << 16); in get_tcr()
79 tcr = TCR_EL3_RSVD | (ips << 16); in get_tcr()
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