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Searched refs:lp3mr11 (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-sunxi/dram_timings/
A Dddr3_1333.c54 writel(0x3, &mctl_ctl->lp3mr11); /* odt_en[7:4] */ in mctl_set_timing_params()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sunxi_dw.h89 u32 lp3mr11; /* 0x2c */ member

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