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Searched refs:lsr (Results 1 – 25 of 41) sorted by relevance

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/u-boot/arch/arm/include/asm/
A Dassembler.h24 #define lspull lsr
27 #define get_byte_1 lsr #8
28 #define get_byte_2 lsr #16
29 #define get_byte_3 lsr #24
36 #define lspush lsr
37 #define get_byte_0 lsr #24
38 #define get_byte_1 lsr #16
39 #define get_byte_2 lsr #8
A Dmacro.h85 lsr \xreg, \xreg, #4
96 lsr \xreg, \xreg, #4
112 lsr \xreg, \xreg, #8
115 lsr \xreg, \xreg, #8
118 lsr \xreg, \xreg, #16
132 lsr \xreg2, \xreg1, #32
135 lsr \xreg1, \xreg1, #40
/u-boot/drivers/serial/
A Dserial_bcm283x_mu.c35 u32 lsr; member
85 if (!(readl(&regs->lsr) & BCM283X_MU_LSR_RX_READY)) in bcm283x_mu_serial_getc()
99 if (!(readl(&regs->lsr) & BCM283X_MU_LSR_TX_EMPTY)) in bcm283x_mu_serial_putc()
112 unsigned int lsr; in bcm283x_mu_serial_pending() local
114 lsr = readl(&regs->lsr); in bcm283x_mu_serial_pending()
118 return (lsr & BCM283X_MU_LSR_RX_READY) ? 1 : 0; in bcm283x_mu_serial_pending()
120 return (lsr & BCM283X_MU_LSR_TX_IDLE) ? 0 : 1; in bcm283x_mu_serial_pending()
A Dserial_pxa.c134 while (!(readl(&uart_regs->lsr) & LSR_TEMT)) in pxa_putc_dev()
152 return readl(&uart_regs->lsr) & LSR_DR; in pxa_tstc_dev()
168 while (!(readl(&uart_regs->lsr) & LSR_DR)) in pxa_getc_dev()
285 if (!(readl(&uart_regs->lsr) & LSR_TEMT)) in pxa_serial_putc()
299 if (!(readl(&uart_regs->lsr) & LSR_DR)) in pxa_serial_getc()
322 return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; in pxa_serial_pending()
324 return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; in pxa_serial_pending()
A Dserial_mt7620.c35 u32 lsr; member
99 if (!(readl(&plat->regs->lsr) & UART_LSR_THRE)) in mt7620_serial_putc()
114 if (!(readl(&plat->regs->lsr) & UART_LSR_DR)) in mt7620_serial_getc()
125 return (readl(&plat->regs->lsr) & UART_LSR_DR) ? 1 : 0; in mt7620_serial_pending()
127 return (readl(&plat->regs->lsr) & UART_LSR_THRE) ? 0 : 1; in mt7620_serial_pending()
238 while (!(readl(&regs->lsr) & UART_LSR_THRE)) in _debug_uart_putc()
A Dns16550.c236 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) in ns16550_init()
251 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) in ns16550_init()
288 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) in ns16550_putc()
305 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { in ns16550_getc()
317 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; in ns16550_tstc()
365 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) { in _debug_uart_putc()
383 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) in ns16550_serial_putc()
404 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0; in ns16550_serial_pending()
406 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1; in ns16550_serial_pending()
413 if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) in ns16550_serial_getc()
A Dserial_mtk.c28 u32 lsr; member
148 if (!(readl(&priv->regs->lsr) & UART_LSR_THRE)) in _mtk_serial_putc()
161 if (!(readl(&priv->regs->lsr) & UART_LSR_DR)) in _mtk_serial_getc()
170 return (readl(&priv->regs->lsr) & UART_LSR_DR) ? 1 : 0; in _mtk_serial_pending()
172 return (readl(&priv->regs->lsr) & UART_LSR_THRE) ? 0 : 1; in _mtk_serial_pending()
452 while (!(readl(&regs->lsr) & UART_LSR_THRE)) in _debug_uart_putc()
/u-boot/arch/arm/lib/
A Dlib1funcs.S75 cmp \dividend, \divisor, lsr #1
78 cmp \dividend, \divisor, lsr #2
81 cmp \dividend, \divisor, lsr #3
86 movne \divisor, \divisor, lsr #4
107 movhs \divisor, \divisor, lsr #8
111 movhs \divisor, \divisor, lsr #4
163 cmp \dividend, \divisor, lsr #1
165 cmp \dividend, \divisor, lsr #2
170 mov \divisor, \divisor, lsr #4
218 mov r0, r0, lsr r2
[all …]
A Ddiv64.S92 movsne ip, ip, lsr #1
93 mov yl, yl, lsr #1
113 movs ip, ip, lsr #1
131 mov ip, ip, lsr xh
136 mov ip, ip, lsr #1
145 movs ip, ip, lsr #1
167 movhs yl, yl, lsr #8
171 movhs yl, yl, lsr #4
180 mov yh, xh, lsr ip
181 mov yl, xl, lsr ip
[all …]
A Dmuldi3.S31 mov ip, xl, lsr #16
32 mov yh, yl, lsr #16
40 adc xh, xh, yh, lsr #16
42 adc xh, xh, ip, lsr #16
A Duldivmod.S141 movs C_1, C_1, lsr #1
147 movs B_1, B_1, lsr #1
182 mov A_0, A_1, lsr D_0
185 movpl A_0, A_0, lsr D_0
189 mov A_1, A_1, lsr D_0
211 moveq B_0, B_0, lsr #16
214 moveq B_0, B_0, lsr #8
217 moveq B_0, B_0, lsr #4
220 moveq B_0, B_0, lsr #2
225 mov Q_0, A_0, lsr D_0
[all …]
A Dlshrdi3.S23 movmi al, al, lsr r2
24 movpl al, ah, lsr r3
28 mov ah, ah, lsr r2
A Dashldi3.S25 ARM( orrmi ah, ah, al, lsr ip )
A Dashrdi3.S23 movmi al, al, lsr r2
A Dgic_64.S83 lsr x9, x10, #32
87 lsr x11, x11, #32 /* w11 is aff3:aff2:aff1:aff0 */
/u-boot/arch/arm/cpu/armv7/
A Dcache_v7_asm.S28 mov r3, r0, lsr #23 @ move LoC into position
34 add r2, r10, r10, lsr #1 @ work out 3x current cache level
35 mov r1, r0, lsr r2 @ extract cache type bits from clidr
45 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
48 ands r7, r7, r1, lsr #13 @ extract max number of the index size
99 mov r3, r0, lsr #23 @ move LoC into position
104 add r2, r10, r10, lsr #1 @ work out 3x current cache level
105 mov r1, r0, lsr r2 @ extract cache type bits from clidr
115 ands r4, r4, r1, lsr #3 @ find maximum number on the way size
118 ands r7, r7, r1, lsr #13 @ extract max number of the index size
/u-boot/arch/arm/cpu/armv8/
A Dcache.S33 and x3, x3, x6, lsr #3 /* x3 <- max number of #ways */
36 and x4, x4, x6, lsr #13 /* x4 <- max number of #sets */
75 lsr x11, x10, #24
88 lsr x12, x10, x12
134 lsr x3, x3, #16
A Dsec_firmware_asm.S29 lsr x3, x4, #32
/u-boot/arch/arm/mach-imx/mx7/
A Dpsci-suspend.S23 and r2, r1, r0, lsr #13
27 and r3, r1, r0, lsr #3 @ NumWays - 1
/u-boot/board/freescale/m54451evb/
A Dsbf_dram_init.S28 lsr.l #1, %d2
32 lsr.l #1, %d2
/u-boot/arch/arm/mach-rmobile/
A Dlowlevel_init_ca15.S15 orr r4, r4, r4, lsr #6
54 lsr r0, r0, #8
/u-boot/board/freescale/m54455evb/
A Dsbf_dram_init.S28 lsr.l #1, %d2
32 lsr.l #1, %d2
/u-boot/arch/arm/include/asm/arch-rockchip/
A Duart.h14 unsigned int lsr; /* Line status register. */ member
/u-boot/arch/arm/include/asm/arch-pxa/
A Dregs-uart.h30 uint32_t lsr; member
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dpsci.S101 lsr r1, r1, #8
138 lsr r2, r2, r1
227 lsr r2, r2, r1

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