Home
last modified time | relevance | path

Searched refs:m5 (Results 1 – 8 of 8) sorted by relevance

/u-boot/configs/
A DMele_M5_defconfig9 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
/u-boot/arch/arm/include/asm/arch-omap3/
A Dclock.h45 unsigned int m5; member
/u-boot/arch/arm/dts/
A Dsun7i-a20-m5.dts13 compatible = "mele,m5", "allwinner,sun7i-a20";
A DMakefile531 sun7i-a20-m5.dtb \
/u-boot/arch/arm/mach-omap2/am33xx/
A Dclock.c30 if (params->m5 >= 0) in setup_post_dividers()
31 writel(params->m5, dpll_regs->cm_div_m5_dpll); in setup_post_dividers()
/u-boot/arch/arm/include/asm/arch-am33xx/
A Dclock.h87 s8 m5; member
/u-boot/test/
A Dnokia_rx51_test.sh181 dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1
/u-boot/arch/arm/mach-omap2/omap3/
A Dclock.c498 clrsetbits_le32(&prcm_base->clksel_cam, 0x0000003F, ptr->m5); in dpll4_init_36xx()

Completed in 10 milliseconds