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Searched refs:maer0 (Results 1 – 4 of 4) sorted by relevance

/u-boot/arch/arm/include/asm/arch-sunxi/
A Ddram_sun50i_h616.h36 u32 maer0; /* 0x020 master enable register 0 */ member
A Ddram_sun50i_h6.h41 u32 maer0; /* 0x020 master enable register 0 */ member
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun50i_h616.c126 writel(0, &mctl_com->maer0); in mctl_sys_init()
892 writel(0, &mctl_com->maer0); in mctl_ctrl_init()
910 writel(0xffffffff, &mctl_com->maer0); in mctl_ctrl_init()
A Ddram_sun50i_h6.c185 writel(0, &mctl_com->maer0); in mctl_sys_init()
551 writel(0xffffffff, &mctl_com->maer0); in mctl_channel_init()

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