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Searched refs:mbus_clk_cfg (Results 1 – 5 of 5) sorted by relevance

/u-boot/arch/arm/mach-sunxi/
A Dclock_sun8i_a83t.c45 writel(MBUS_CLK_DEFAULT, &ccm->mbus_clk_cfg); in clock_init_safe()
A Ddram_sun8i_a83t.c397 clrbits_le32(&ccm->mbus_clk_cfg, MBUS_CLK_GATE); in mctl_sys_init()
415 setbits_le32(&ccm->mbus_clk_cfg, MBUS_CLK_GATE); in mctl_sys_init()
A Ddram_sun4i.c333 writel(reg_val, &ccm->mbus_clk_cfg); in mctl_setup_dram_clock()
/u-boot/arch/arm/include/asm/arch-sunxi/
A Dclock_sun8i_a83t.h82 u32 mbus_clk_cfg; /* 0x15c MBUS module clock */ member
A Dclock_sun4i.h87 u32 mbus_clk_cfg; /* 0x15c */ member

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