Searched refs:mc_reset (Results 1 – 4 of 4) sorted by relevance
/u-boot/arch/mips/mach-mtmips/ |
A D | ddr_init.c | 70 u32 dq_dly, u32 dqs_dly, mc_reset_t mc_reset, u32 bw) in mc_ddr_init() argument 74 mc_reset(1); in mc_ddr_init() 76 mc_reset(0); in mc_ddr_init() 120 param->dqs_dly, param->mc_reset, bw); in ddr1_init() 140 param->dqs_dly, param->mc_reset, bw); in ddr1_init() 165 param->dqs_dly, param->mc_reset, bw); in ddr2_init() 197 param->dqs_dly, param->mc_reset, bw); in ddr2_init() 207 mc_reset(1); in mc_sdr_init() 209 mc_reset(0); in mc_sdr_init() 232 mc_sdr_init(param->memc, param->mc_reset, param->sdr_cfg0, in sdr_init() [all …]
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/u-boot/arch/mips/mach-mtmips/include/mach/ |
A D | ddr.h | 45 mc_reset_t mc_reset; member
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/u-boot/arch/mips/mach-mtmips/mt7620/ |
A D | dram.c | 89 param.mc_reset = mt7620_memc_reset; in mt7620_dram_init()
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/u-boot/arch/mips/mach-mtmips/mt7628/ |
A D | ddr.c | 151 param.mc_reset = mt7628_memc_reset; in mt7628_ddr_init()
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