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Searched refs:mckr (Results 1 – 10 of 10) sorted by relevance

/u-boot/arch/arm/mach-at91/armv7/
A Dclock.c59 unsigned freq, mckr; in at91_clock_init() local
86 mckr = readl(&pmc->mckr); in at91_clock_init()
89 if (mckr & (1 << 12)) in at91_clock_init()
131 tmp = readl(&pmc->mckr); in at91_mck_init()
148 writel(tmp, &pmc->mckr); in at91_mck_init()
165 tmp = readl(&pmc->mckr); in at91_mck_init_down()
168 writel(tmp, &pmc->mckr); in at91_mck_init_down()
174 tmp = readl(&pmc->mckr); in at91_mck_init_down()
177 writel(tmp, &pmc->mckr); in at91_mck_init_down()
180 tmp = readl(&pmc->mckr); in at91_mck_init_down()
[all …]
/u-boot/arch/arm/mach-at91/arm926ejs/
A Dclock.c116 unsigned freq, mckr; in at91_clock_init() local
156 mckr = readl(&pmc->mckr); in at91_clock_init()
220 void at91_mck_init(u32 mckr) in at91_mck_init() argument
225 tmp = readl(&pmc->mckr); in at91_mck_init()
228 writel(tmp, &pmc->mckr); in at91_mck_init()
232 tmp = readl(&pmc->mckr); in at91_mck_init()
235 writel(tmp, &pmc->mckr); in at91_mck_init()
239 tmp = readl(&pmc->mckr); in at91_mck_init()
242 writel(tmp, &pmc->mckr); in at91_mck_init()
246 tmp = readl(&pmc->mckr); in at91_mck_init()
[all …]
/u-boot/arch/arm/mach-at91/include/mach/
A Dat91_common.h26 void at91_mck_init(u32 mckr);
27 void at91_mck_init_down(u32 mckr);
32 void at91_mck_init(u32 mckr);
A Dclk.h65 return readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV; in get_h32mxdiv()
A Dat91_pmc.h42 u32 mckr; /* 0x30 Master Clock Register */ member
/u-boot/arch/arm/mach-at91/arm920t/
A Dclock.c108 unsigned freq, mckr; in at91_clock_init() local
148 mckr = readl(&pmc->mckr); in at91_clock_init()
149 gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); in at91_clock_init()
152 freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */ in at91_clock_init()
155 (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); in at91_clock_init()
/u-boot/arch/arm/mach-at91/
A Dspl_at91.c48 if ((readl(&pmc->mckr) & AT91_PMC_CSS) == AT91_PMC_CSS_SLOW) { in lowlevel_clock_init()
51 tmp = readl(&pmc->mckr); in lowlevel_clock_init()
54 writel(tmp, &pmc->mckr); in lowlevel_clock_init()
60 writel(tmp, &pmc->mckr); in lowlevel_clock_init()
/u-boot/drivers/clk/at91/
A Dclk-master.c83 unsigned int mckr; in clk_master_get_rate() local
89 pmc_read(master->base, master->layout->offset, &mckr); in clk_master_get_rate()
90 mckr &= layout->mask; in clk_master_get_rate()
92 pres = (mckr >> layout->pres_shift) & MASTER_PRES_MASK; in clk_master_get_rate()
93 div = (mckr >> MASTER_DIV_SHIFT) & MASTER_DIV_MASK; in clk_master_get_rate()
A Dcompat.c297 if (readl(&pmc->mckr) & AT91_PMC_MCKR_PLLADIV_2) in at91_plladiv_clk_get_rate()
320 writel((readl(&pmc->mckr) | AT91_PMC_MCKR_PLLADIV_2), in at91_plladiv_clk_set_rate()
321 &pmc->mckr); in at91_plladiv_clk_set_rate()
693 if (readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV) in sama5d4_h32mx_clk_get_rate()
/u-boot/board/esd/meesc/
A Dmeesc.c241 writel((readl(&pmc->mckr) & ~AT91_PMC_MDIV) | in misc_init_r()
242 AT91SAM9_PMC_MDIV_4, &pmc->mckr); in misc_init_r()

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