Searched refs:mdctl (Results 1 – 12 of 12) sorted by relevance
/u-boot/arch/arm/mach-keystone/ |
A D | psc.c | 98 u32 mdctl; in psc_set_state() local 132 mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, state); in psc_set_state() 158 u32 mdctl; in psc_enable_module() local 176 u32 mdctl; in psc_disable_module() local 182 mdctl = PSC_REG_MDCTL_SET_LRSTZ(mdctl, 0); in psc_disable_module() 202 u32 mdctl; in psc_set_reset_iso() local 206 mdctl = PSC_REG_MDCTL_SET_RESET_ISO(mdctl, 1); in psc_set_reset_iso() 258 if ((mdctl & PSC_REG_MDCTL_SET_LRSTZ(mdctl, 1))) { in psc_module_keep_in_reset_enabled() 259 mdctl = PSC_REG_MDCTL_SET_LRSTZ(mdctl, 0); in psc_module_keep_in_reset_enabled() 269 mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, next_state); in psc_module_keep_in_reset_enabled() [all …]
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/u-boot/arch/arm/mach-davinci/ |
A D | psc.c | 35 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in lpsc_transition() local 43 mdctl = &psc_regs->psc0.mdctl[id]; in lpsc_transition() 50 mdctl = &psc_regs->psc1.mdctl[id]; in lpsc_transition() 61 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl); in lpsc_transition()
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/u-boot/arch/arm/mach-imx/ |
A D | mmdc_size.c | 27 #define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) argument 28 #define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) argument 29 #define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) argument 30 #define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) argument
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/u-boot/drivers/ddr/fsl/ |
A D | fsl_mmdc.c | 54 tmp = priv->mdctl & ~(MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init() 55 out_be32(&mmdc->mdctl, tmp); in mmdc_init() 63 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0); in mmdc_init() 65 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
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/u-boot/board/davinci/da8xxevm/ |
A D | omapl138_lcdk.c | 247 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local 252 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on() 262 *mdctl |= 0x03; in dsp_lpsc_on()
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A D | da850evm.c | 78 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local 83 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on() 93 *mdctl |= 0x03; in dsp_lpsc_on()
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/u-boot/arch/arm/mach-davinci/include/mach/ |
A D | psc_defs.h | 49 unsigned int mdctl[52]; /* 0xA00 */ member
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A D | hardware.h | 180 dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT]; member 185 dv_reg mdctl[PSC_PSC1_MODULE_ID_CNT]; member
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/u-boot/include/ |
A D | fsl_mmdc.h | 67 u32 mdctl; member 153 u32 mdctl; member
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/u-boot/board/freescale/ls1012afrdm/ |
A D | ls1012afrdm.c | 136 mparam.mdctl = 0x05180000; in dram_init()
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/u-boot/arch/arm/mach-imx/mx6/ |
A D | ddr.c | 306 cs0_enable_initial = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration() 307 cs1_enable_initial = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration() 350 clrbits_le32(&mmdc0->mdctl, 1 << 30); /* clear SDE_1 */ in mmdc_do_dqs_calibration() 352 clrbits_le32(&mmdc0->mdctl, 1 << 31); /* clear SDE_0 */ in mmdc_do_dqs_calibration() 358 cs0_enable = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration() 359 cs1_enable = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration() 566 setbits_le32(&mmdc0->mdctl, 1 << 30); in mmdc_do_dqs_calibration() 570 setbits_le32(&mmdc0->mdctl, 1 << 31); in mmdc_do_dqs_calibration() 1223 mmdc0->mdctl |= (1 << 31) | /* SDE_0 for CS0 */ in mx6_lpddr2_cfg() 1507 mmdc0->mdctl = (ddr3_cfg->rowaddr - 11) << 24 | /* ROW */ in mx6_ddr3_cfg() [all …]
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/u-boot/arch/arm/include/asm/arch-mx6/ |
A D | mx6-ddr.h | 39 u32 mdctl; member
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