Searched refs:mdscr (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/ddr/fsl/ |
| A D | fsl_mmdc.c | 35 out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ); in mmdc_init()
69 out_be32(&mmdc->mdscr, CMD_ADDR_LSB_MR_ADDR(8) | MDSCR_ENABLE_CON_REQ | in mmdc_init()
78 out_be32(&mmdc->mdscr, CMD_ADDR_MSB_MR_OP(0x19) | in mmdc_init()
91 out_be32(&mmdc->mdscr, CMD_ADDR_LSB_MR_ADDR(0x84) | in mmdc_init()
95 out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ | MDSCR_WL_EN | in mmdc_init()
105 out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ); in mmdc_init()
110 out_be32(&mmdc->mdscr, CMD_ADDR_MSB_MR_OP(4) | MDSCR_ENABLE_CON_REQ | in mmdc_init()
128 out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ | CMD_LOAD_MODE_REG | in mmdc_init()
132 out_be32(&mmdc->mdscr, CMD_ADDR_MSB_MR_OP(4) | MDSCR_ENABLE_CON_REQ | in mmdc_init()
141 out_be32(&mmdc->mdscr, MDSCR_ENABLE_CON_REQ | CMD_LOAD_MODE_REG | in mmdc_init()
[all …]
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| /u-boot/arch/arm/mach-imx/mx6/ |
| A D | ddr.c | 43 writel(0x04008050, &mmdc0->mdscr); in precharge_all()
48 writel(0x04008058, &mmdc0->mdscr); in precharge_all()
159 writel(0x00808231, &mmdc0->mdscr); in mmdc_do_write_level_calibration()
246 writel(0, &mmdc0->mdscr); in mmdc_do_write_level_calibration()
333 writel(0x00008020, &mmdc0->mdscr); in mmdc_do_dqs_calibration()
335 writel(0x00008028, &mmdc0->mdscr); in mmdc_do_dqs_calibration()
1229 mmdc0->mdscr = MR(63, 0, 3, cs); in mx6_lpddr2_cfg()
1234 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1263 mmdc0->mdscr = 0x00000000; in mx6_lpddr2_cfg()
1531 mmdc0->mdscr = MR(0, 3, 3, cs); in mx6_ddr3_cfg()
[all …]
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| /u-boot/include/ |
| A D | fsl_mmdc.h | 74 u32 mdscr; member
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| /u-boot/arch/arm/include/asm/arch-mx6/ |
| A D | mx6-ddr.h | 46 u32 mdscr; member
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