| /u-boot/tools/binman/test/ |
| A D | 030_x86_rom_me_no_desc.dts | 11 intel-me {
12 filename = "me.bin";
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| A D | 031_x86_rom_me.dts | 15 intel-me {
16 filename = "me.bin";
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| A D | 163_x86_rom_me_empty.dts | 17 intel-me {
18 filename = "me.bin";
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| A D | 164_x86_rom_me_missing.dts | 17 intel-me {
18 filename = "me.bin";
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| A D | 045_prop_test.dts | 11 intel-me {
12 filename = "me.bin";
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| /u-boot/post/lib_powerpc/ |
| A D | rlwinm.c | 33 uchar me; member
71 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwinm()
89 test->me) | BIT_C, in cpu_post_test_rlwinm()
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| A D | rlwnm.c | 34 uchar me; member
76 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me), in cpu_post_test_rlwnm()
97 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) | in cpu_post_test_rlwnm()
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| A D | rlwimi.c | 35 uchar me; member
76 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwimi()
95 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | in cpu_post_test_rlwimi()
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| /u-boot/doc/board/google/ |
| A D | chromebook_link.rst | 10 * me.bin - Intel Management Engine
22 * ./mainboard/google/link/me.bin
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| A D | chromebook_samus.rst | 10 * me.bin - Intel Management Engine
37 Rename flashregion_2_intel_me.bin to me.bin
100 :ff801000: intel-me (address set by descriptor.bin)
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| /u-boot/arch/x86/cpu/broadwell/ |
| A D | Makefile | 26 obj-y += me.o
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| /u-boot/arch/arm/include/asm/arch-octeontx2/csrs/ |
| A D | csrs-rvu.h | 755 u64 me : 16; member
777 u64 me : 16; member
799 u64 me : 16; member
821 u64 me : 16; member
842 u64 me : 16; member
1325 u64 me : 64; member
1346 u64 me : 64; member
1367 u64 me : 64; member
1388 u64 me : 64; member
1408 u64 me : 64; member
|
| /u-boot/doc/board/intel/ |
| A D | minnowmax.rst | 46 894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin
55 001000 me.bin Set by the descriptor
|
| A D | bayleybay.rst | 20 $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin
|
| A D | cherryhill.rst | 10 Extract descriptor.bin and me.bin from the original BIOS on the board using
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| /u-boot/doc/device-tree-bindings/gpio/ |
| A D | snps,creg-gpio.txt | 27 - gpio-default-val: array of default output values (must me 0 or 1)
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| /u-boot/board/qualcomm/dragonboard410c/ |
| A D | readme.txt | 8 git://codeaurora.org/quic/kernel/skales (15ece94f09 worked for me)
|
| /u-boot/arch/x86/dts/ |
| A D | u-boot.dtsi | 28 intel-me {
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| A D | chromebook_link.dts | 368 me@16,0 {
370 compatible = "intel,me";
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| A D | chromebook_samus.dts | 557 me@16,0 {
559 compatible = "intel,me";
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| /u-boot/arch/arm/dts/ |
| A D | rk3288-veyron-mickey.dts | 136 * - 800 MHz appears to be a "sweet spot" for me. I can run
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| /u-boot/Licenses/ |
| A D | README | 21 copyrighted by me and others who actually wrote it.
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| /u-boot/board/qualcomm/dragonboard820c/ |
| A D | readme.txt | 22 commit 8492547e404e969262d9070dee9bdd15668bb70f worked for me.
|
| /u-boot/tools/binman/ |
| A D | README.entries | 506 With this entry in your image, the position of the 'intel-me' entry will be
635 Entry: intel-me: Entry containing an Intel Management Engine (ME) file
647 A typical filename is 'me.bin'.
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| /u-boot/ |
| A D | Kconfig | 316 intel-descriptor intel-me intel-refcode intel-vga intel-mrc
|