Searched refs:mii1_crs (Results 1 – 25 of 26) sorted by relevance
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/u-boot/board/grinn/chiliboard/ |
A D | board.c | 51 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */
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/u-boot/arch/arm/include/asm/arch-am33xx/ |
A D | mux_am43xx.h | 97 int mii1_crs; member
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A D | mux_am33xx.h | 105 int mii1_crs; member
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/u-boot/board/isee/igep003x/ |
A D | mux.c | 61 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS_DV */
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/u-boot/board/bosch/guardian/ |
A D | mux.c | 35 {OFFSET(mii1_crs), (MODE(7) | PULLDOWN_EN)},
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/u-boot/board/phytec/phycore_am335x_r2/ |
A D | mux.c | 56 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */
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/u-boot/board/vscom/baltos/ |
A D | mux.c | 49 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RGMII1_TCTL */
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/u-boot/board/ti/am43xx/ |
A D | mux.c | 21 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS_DV */
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/u-boot/arch/arm/dts/ |
A D | am335x-draco.dts | 68 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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A D | am335x-chiliboard.dts | 48 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
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A D | am335x-pdu001.dts | 155 AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */
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A D | am335x-phycore-som.dtsi | 61 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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A D | am335x-baltos.dts | 83 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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A D | am335x-icev2.dts | 199 AM33XX_IOPAD(0x90c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* mii1_crs.rmii1_crs_dv */
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A D | am335x-rut.dts | 424 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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A D | am437x-sk-evm.dts | 365 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
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A D | am335x-evm.dts | 350 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
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A D | am335x-evmsk.dts | 407 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
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/u-boot/board/BuR/brxre1/ |
A D | mux.c | 105 {OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
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/u-boot/board/BuR/brsmarc1/ |
A D | mux.c | 167 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRSDV */
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/u-boot/board/BuR/brppt1/ |
A D | mux.c | 79 {OFFSET(mii1_crs), MODE(0) | RXACTIVE}, /* MII1_CRS */
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/u-boot/board/bosch/shc/ |
A D | mux.c | 178 {OFFSET(mii1_crs), MODE(0) | RXACTIVE},
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/u-boot/board/ti/am335x/ |
A D | mux.c | 187 {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* MII1_CRS */
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/u-boot/board/siemens/rut/ |
A D | mux.c | 125 {OFFSET(mii1_crs), (MODE(1) | RXACTIVE)},
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/u-boot/board/siemens/draco/ |
A D | mux.c | 230 {OFFSET(mii1_crs), (MODE(1) | RXACTIVE)},
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