Searched refs:miim (Results 1 – 14 of 14) sorted by relevance
| /u-boot/drivers/net/mscc_eswitch/ |
| A D | mscc_miim.c | 25 static int mscc_miim_wait_ready(struct mscc_miim_dev *miim) in mscc_miim_wait_ready() argument
37 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
43 miim->regs + MIIM_CMD); in mscc_miim_read()
45 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
49 val = readl(miim->regs + MIIM_DATA); in mscc_miim_read()
66 ret = mscc_miim_wait_ready(miim); in mscc_miim_write()
72 MIIM_CMD_OPR_WRITE, miim->regs + MIIM_CMD); in mscc_miim_write()
92 miim[*miim_count].miim_base = miim_base; in mscc_mdiobus_init()
93 miim[*miim_count].miim_size = miim_size; in mscc_mdiobus_init()
94 bus->priv = &miim[*miim_count]; in mscc_mdiobus_init()
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| A D | mscc_miim.h | 19 struct mii_dev *mscc_mdiobus_init(struct mscc_miim_dev *miim, int *miim_count,
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| A D | servalt_switch.c | 136 static struct mscc_miim_dev miim[SERVALT_MIIM_BUS_COUNT]; variable
397 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
398 return miim[i].bus; in get_mdiobus()
438 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * in servalt_probe()
472 mscc_mdiobus_init(miim, &miim_count, addr_base, in servalt_probe()
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| A D | serval_switch.c | 165 static struct mscc_miim_dev miim[SERVAL_MIIM_BUS_COUNT]; variable
464 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
465 return miim[i].bus; in get_mdiobus()
509 memset(&miim, 0x0, sizeof(miim) * SERVAL_MIIM_BUS_COUNT); in serval_probe()
544 mscc_mdiobus_init(miim, &miim_count, addr_base, in serval_probe()
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| A D | luton_switch.c | 197 static struct mscc_miim_dev miim[LUTON_MIIM_BUS_COUNT]; variable
570 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
571 return miim[i].bus; in get_mdiobus()
634 memset(&miim, 0x0, sizeof(miim) * LUTON_MIIM_BUS_COUNT); in luton_probe()
669 mscc_mdiobus_init(miim, &miim_count, addr_base, in luton_probe()
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| A D | ocelot_switch.c | 166 static struct mscc_miim_dev miim[OCELOT_MIIM_BUS_COUNT]; variable
507 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
508 return miim[i].bus; in get_mdiobus()
556 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * in ocelot_probe()
589 mscc_mdiobus_init(miim, &miim_count, addr_base, in ocelot_probe()
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| A D | jr2_switch.c | 280 static struct mscc_miim_dev miim[JR2_MIIM_BUS_COUNT]; variable
823 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
824 return miim[i].bus; in get_mdiobus()
869 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * JR2_MIIM_BUS_COUNT); in jr2_probe()
904 mscc_mdiobus_init(miim, &miim_count, addr_base, in jr2_probe()
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| /u-boot/drivers/net/ |
| A D | pch_gbe.c | 345 if (readl(&mac_regs->miim) & PCH_GBE_MIIM_OPER_READY) in pch_gbe_mdio_ready()
357 u32 miim; in pch_gbe_mdio_read() local
362 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_read()
365 writel(miim, &mac_regs->miim); in pch_gbe_mdio_read()
370 return readl(&mac_regs->miim) & 0xffff; in pch_gbe_mdio_read()
377 u32 miim; in pch_gbe_mdio_write() local
382 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_write()
385 writel(miim, &mac_regs->miim); in pch_gbe_mdio_write()
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| A D | pch_gbe.h | 258 u32 miim; member
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| /u-boot/arch/mips/dts/ |
| A D | mscc,luton.dtsi | 146 compatible = "mscc,luton-miim";
154 compatible = "mscc,luton-miim";
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| A D | mscc,servalt.dtsi | 176 compatible = "mscc,jr2-miim";
184 compatible = "mscc,jr2-miim";
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| A D | mscc,serval.dtsi | 184 compatible = "mscc,serval-miim";
192 compatible = "mscc,serval-miim";
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| A D | mscc,jr2.dtsi | 272 compatible = "mscc,jr2-miim";
280 compatible = "mscc,jr2-miim";
288 compatible = "mscc,jr2-miim";
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| A D | mscc,ocelot.dtsi | 155 compatible = "mscc,ocelot-miim";
164 compatible = "mscc,ocelot-miim";
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