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Searched refs:mode_config (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/ddr/marvell/axp/
A Dddr3_hw_training.c703 u32 mode_config[MAX_TRAINING_MODE]; in ddr3_save_training() local
705 mode_config[DQS_WR_MODE] = PUP_DQS_WR; in ddr3_save_training()
706 mode_config[WL_MODE_] = PUP_WL_MODE; in ddr3_save_training()
707 mode_config[RL_MODE_] = PUP_RL_MODE; in ddr3_save_training()
708 mode_config[DQS_RD_MODE] = PUP_DQS_RD; in ddr3_save_training()
709 mode_config[PBS_TX_DM_MODE] = PUP_PBS_TX_DM; in ddr3_save_training()
710 mode_config[PBS_TX_MODE] = PUP_PBS_TX; in ddr3_save_training()
711 mode_config[PBS_RX_MODE] = PUP_PBS_RX; in ddr3_save_training()
732 mode_config[i], CS0, pup); in ddr3_save_training()
743 mode_config[i] + dq, in ddr3_save_training()
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