Searched refs:mode_shift (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/power/regulator/ |
| A D | max77686.c | 539 unsigned int mask, adr, mode, mode_shift; in max77686_buck_mode() local
556 mode_shift = MAX77686_BUCK_MODE_SHIFT_2; in max77686_buck_mode()
559 mode_shift = MAX77686_BUCK_MODE_SHIFT_1; in max77686_buck_mode()
562 mask = MAX77686_BUCK_MODE_MASK << mode_shift; in max77686_buck_mode()
570 val >>= mode_shift; in max77686_buck_mode()
589 mode = MAX77686_BUCK_MODE_STANDBY << mode_shift; in max77686_buck_mode()
600 mode = MAX77686_BUCK_MODE_LPM << mode_shift; in max77686_buck_mode()
607 mode = MAX77686_BUCK_MODE_ON << mode_shift; in max77686_buck_mode()
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3328.c | 215 u32 mode_shift, mode_mask; in rkclk_set_pll() local
218 mode_shift = 0; in rkclk_set_pll()
222 mode_shift = APLL_MODE_SHIFT; in rkclk_set_pll()
226 mode_shift = DPLL_MODE_SHIFT; in rkclk_set_pll()
230 mode_shift = CPLL_MODE_SHIFT; in rkclk_set_pll()
234 mode_shift = GPLL_MODE_SHIFT; in rkclk_set_pll()
238 mode_shift = NPLL_MODE_SHIFT; in rkclk_set_pll()
243 mode_mask = 1 << mode_shift; in rkclk_set_pll()
261 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift); in rkclk_set_pll()
281 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift); in rkclk_set_pll()
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| A D | clk_pll.c | 205 pll->mode_mask << pll->mode_shift, in rk3036_pll_set_rate()
206 RKCLK_PLL_MODE_SLOW << pll->mode_shift); in rk3036_pll_set_rate()
240 rk_clrsetreg(base + pll->mode_offset, pll->mode_mask << pll->mode_shift, in rk3036_pll_set_rate()
241 RKCLK_PLL_MODE_NORMAL << pll->mode_shift); in rk3036_pll_set_rate()
259 shift = pll->mode_shift; in rk3036_pll_get_rate()
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | clock.h | 46 .mode_shift = _mshift, \
91 unsigned int mode_shift; member
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