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Searched refs:mpdgctrl1 (Results 1 – 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-imx/mx6/
A Dddr.c445 &mmdc0->mpdgctrl1); in mmdc_do_dqs_calibration()
450 &mmdc1->mpdgctrl1); in mmdc_do_dqs_calibration()
588 debug("\tMPDGCTRL1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl1)); in mmdc_do_dqs_calibration()
591 debug("\tMPDGCTRL1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl1)); in mmdc_do_dqs_calibration()
1153 mmdc0->mpdgctrl1 = calib->p0_mpdgctrl1; in mx6_lpddr2_cfg()
1439 mmdc0->mpdgctrl1 = calib->p0_mpdgctrl1; in mx6_ddr3_cfg()
1446 MMDC1(mpdgctrl1, calib->p1_mpdgctrl1); in mx6_ddr3_cfg()
1658 calib->p0_mpdgctrl1 = readl(&mmdc0->mpdgctrl1); in mmdc_read_calibration()
1666 calib->p1_mpdgctrl1 = readl(&mmdc1->mpdgctrl1); in mmdc_read_calibration()
/u-boot/include/
A Dfsl_mmdc.h117 u32 mpdgctrl1; member
/u-boot/arch/arm/include/asm/arch-mx6/
A Dmx6-ddr.h89 u32 mpdgctrl1; member

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