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Searched refs:mpzqhwctrl (Results 1 – 4 of 4) sorted by relevance

/u-boot/include/
A Dfsl_mmdc.h101 u32 mpzqhwctrl; member
165 u32 mpzqhwctrl; member
/u-boot/drivers/ddr/fsl/
A Dfsl_mmdc.c87 set_wait_for_bits_clear(&mmdc->mpzqhwctrl, priv->mpzqhwctrl, in mmdc_init()
/u-boot/arch/arm/mach-imx/mx6/
A Dddr.c142 zq_val = readl(&mmdc0->mpzqhwctrl); in mmdc_do_write_level_calibration()
143 writel(zq_val & ~0x3, &mmdc0->mpzqhwctrl); in mmdc_do_write_level_calibration()
218 writel(zq_val, &mmdc0->mpzqhwctrl); in mmdc_do_write_level_calibration()
1220 mmdc0->mpzqhwctrl = val; in mx6_lpddr2_cfg()
1257 mmdc0->mpzqhwctrl = val; in mx6_lpddr2_cfg()
1514 mmdc0->mpzqhwctrl = val; in mx6_ddr3_cfg()
1516 MMDC1(mpzqhwctrl, val); in mx6_ddr3_cfg()
1562 mmdc0->mpzqhwctrl = val; in mx6_ddr3_cfg()
1564 MMDC1(mpzqhwctrl, val); in mx6_ddr3_cfg()
/u-boot/arch/arm/include/asm/arch-mx6/
A Dmx6-ddr.h73 u32 mpzqhwctrl; member

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