Searched refs:msch (Results 1 – 11 of 11) sorted by relevance
| /u-boot/drivers/ram/rockchip/ |
| A D | sdram_rk3328.c | 30 struct msch_regs *msch; member
282 writel(ddrconfig, &dram->msch->ddrconf); in set_ddrconfig()
290 writel(noc_timings->ddrmode.d32, &msch->ddrmode); in sdram_msch_config()
296 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
297 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
298 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
299 writel(noc_timings->agingx0, &msch->aging3); in sdram_msch_config()
300 writel(noc_timings->agingx0, &msch->aging4); in sdram_msch_config()
301 writel(noc_timings->agingx0, &msch->aging5); in sdram_msch_config()
535 priv->msch = regmap_get_range(plat->map, 4); in rk3328_dmc_init()
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| A D | sdram_px30.c | 27 struct msch_regs *msch; member
397 &msch->devicesize); in sdram_msch_config()
400 &msch->ddrtiminga0); in sdram_msch_config()
402 &msch->ddrtimingb0); in sdram_msch_config()
404 &msch->ddrtimingc0); in sdram_msch_config()
406 &msch->devtodev0); in sdram_msch_config()
409 &msch->ddr4timing); in sdram_msch_config()
411 writel(noc_timings->agingx0, &msch->aging0); in sdram_msch_config()
412 writel(noc_timings->agingx0, &msch->aging1); in sdram_msch_config()
413 writel(noc_timings->agingx0, &msch->aging2); in sdram_msch_config()
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| A D | dmc-rk3368.c | 35 struct rk3368_msch *msch; member
609 struct rk3368_msch *msch = priv->msch; in sdram_col_row_detect() local
615 writel(6, &msch->ddrconf); in sdram_col_row_detect()
635 writel(15, &msch->ddrconf); in sdram_col_row_detect()
663 static int msch_niu_config(struct rk3368_msch *msch, in msch_niu_config() argument
764 writel(i, &msch->ddrconf); in msch_niu_config()
807 struct rk3368_msch *msch = priv->msch; in setup_sdram() local
819 writel(0x32, &msch->readlatency); in setup_sdram()
867 ret = msch_niu_config(msch, params); in setup_sdram()
919 struct rk3368_msch *msch; in rk3368_dmc_probe() local
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| A D | sdram_rk3188.c | 34 struct rk3188_msch *msch; member
263 struct rk3188_msch *msch = chan->msch; in phy_cfg() local
272 writel(sdram_params->base.noc_timing, &msch->ddrtiming); in phy_cfg()
273 writel(0x3f, &msch->readlatency); in phy_cfg()
385 struct rk3188_msch *msch = chan->msch; in set_bandwidth_ratio() local
390 setbits_le32(&msch->ddrtiming, 1 << 31); in set_bandwidth_ratio()
400 clrbits_le32(&msch->ddrtiming, 1 << 31); in set_bandwidth_ratio()
659 writel(1, &chan->msch->ddrconf); in sdram_col_row_detect()
777 writel(1, &chan->msch->ddrconf); in sdram_init()
786 writel(4, &chan->msch->ddrconf); in sdram_init()
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| A D | sdram_rk3288.c | 36 struct rk3288_msch *msch; member
298 struct rk3288_msch *msch = chan->msch; in phy_cfg() local
308 writel(0x3f, &msch->readlatency); in phy_cfg()
311 1 << BUSRDTORD_SHIFT, &msch->devtodev); in phy_cfg()
444 struct rk3288_msch *msch = chan->msch; in set_bandwidth_ratio() local
449 setbits_le32(&msch->ddrtiming, 1 << 31); in set_bandwidth_ratio()
459 clrbits_le32(&msch->ddrtiming, 1 << 31); in set_bandwidth_ratio()
704 writel(4, &chan->msch->ddrconf); in sdram_col_row_detect()
903 writel(15, &chan->msch->ddrconf); in sdram_init()
1062 priv->chan[0].msch = regmap_get_range(map, 0); in rk3288_dmc_probe()
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| A D | sdram_rk3399.c | 63 struct msch_regs *msch; member
1458 struct msch_regs *ddr_msch_regs = chan->msch; in set_ddrconfig()
1483 &msch->ddrtiminga0.d32); in sdram_msch_config()
1485 &msch->ddrtimingb0.d32); in sdram_msch_config()
1487 &msch->ddrtimingc0.d32); in sdram_msch_config()
1489 &msch->devtodev0.d32); in sdram_msch_config()
1491 &msch->ddrmode.d32); in sdram_msch_config()
1513 ddr_msch_regs = dram->chan[channel].msch; in dram_all_config()
2574 struct msch_regs *ddr_msch_regs = chan->msch; in dram_set_cs()
2607 struct msch_regs *ddr_msch_regs = chan->msch; in dram_set_max_col()
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| A D | sdram_rk322x.c | 31 struct rk322x_service_sys *msch; member
474 struct rk322x_service_sys *axi_bus = chan->msch; in phy_cfg()
539 struct rk322x_service_sys *axi_bus = chan->msch; in dram_cfg_rbc()
607 struct rk322x_service_sys *axi_bus = dram->chan[0].msch; in dram_cap_detect()
797 priv->chan[0].msch = syscon_get_first_range(ROCKCHIP_SYSCON_MSCH); in rk322x_dmc_probe()
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| /u-boot/arch/arm/dts/ |
| A D | rk3128.dtsi | 140 msch {
145 msch@10128000 {
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| A D | rk322x.dtsi | 777 rockchip,msch = <&service_msch>;
785 compatible = "rockchip,rk3228-msch", "syscon";
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| A D | rk3368.dtsi | 235 rockchip,msch = <&service_msch>;
241 compatible = "rockchip,rk3368-msch", "syscon";
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| /u-boot/doc/ |
| A D | README.rockchip | 180 msch:1
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