Home
last modified time | relevance | path

Searched refs:mux_mask (Results 1 – 8 of 8) sorted by relevance

/u-boot/drivers/clk/mediatek/
A Dclk-mtk.h114 u32 mux_mask; member
127 .mux_mask = BIT(_width) - 1, \
142 .mux_mask = BIT(_width) - 1, \
159 .mux_mask = BIT(_width) - 1, \
A Dclk-mtk.c73 val = (mux->mux_mask << mux->mux_shift); in mtk_clk_mux_set_parent()
84 val &= ~(mux->mux_mask << mux->mux_shift); in mtk_clk_mux_set_parent()
319 index &= mux->mux_mask << mux->mux_shift; in mtk_topckgen_get_mux_rate()
/u-boot/drivers/pinctrl/nxp/
A Dpinctrl-imx.c32 u32 mux_shift = info->mux_mask ? ffs(info->mux_mask) - 1 : 0; in imx_pinctrl_set_state()
116 info->mux_mask, in imx_pinctrl_set_state()
180 ~info->mux_mask, in imx_pinctrl_set_state()
231 info->mux_mask = fdtdec_get_int(gd->fdt_blob, node, "fsl,mux_mask", 0); in imx_pinctrl_probe()
A Dpinctrl-imx.h19 unsigned int mux_mask; member
/u-boot/arch/arm/dts/
A Dimxrt1020.dtsi72 fsl,mux_mask = <0x7>;
A Dimxrt1050.dtsi64 fsl,mux_mask = <0x7>;
A Dvf.dtsi115 fsl,mux_mask = <0x700000>;
A Dimx7ulp.dtsi500 fsl,mux_mask = <0xf00>;
507 fsl,mux_mask = <0xf00>;

Completed in 13 milliseconds