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Searched refs:mux_type (Results 1 – 13 of 13) sorted by relevance

/u-boot/drivers/pinctrl/rockchip/
A Dpinctrl-rk3036.c20 int reg, ret, mask, mux_type; in rk3036_set_mux() local
28 mux_type = bank->iomux[iomux_num].type; in rk3036_set_mux()
30 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3036_set_mux()
A Dpinctrl-rk3188.c20 int reg, ret, mask, mux_type; in rk3188_set_mux() local
28 mux_type = bank->iomux[iomux_num].type; in rk3188_set_mux()
30 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3188_set_mux()
A Dpinctrl-rk3368.c20 int reg, ret, mask, mux_type; in rk3368_set_mux() local
28 mux_type = bank->iomux[iomux_num].type; in rk3368_set_mux()
30 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3368_set_mux()
A Dpinctrl-rk3128.c107 int reg, ret, mask, mux_type; in rk3128_set_mux() local
115 mux_type = bank->iomux[iomux_num].type; in rk3128_set_mux()
117 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3128_set_mux()
A Dpinctrl-rk3288.c38 int reg, ret, mask, mux_type; in rk3288_set_mux() local
46 mux_type = bank->iomux[iomux_num].type; in rk3288_set_mux()
48 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3288_set_mux()
A Dpinctrl-rk322x.c151 int reg, ret, mask, mux_type; in rk3228_set_mux() local
159 mux_type = bank->iomux[iomux_num].type; in rk3228_set_mux()
161 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3228_set_mux()
A Dpinctrl-rv1108.c85 int reg, ret, mask, mux_type; in rv1108_set_mux() local
93 mux_type = bank->iomux[iomux_num].type; in rv1108_set_mux()
95 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rv1108_set_mux()
A Dpinctrl-rk3399.c60 int reg, ret, mask, mux_type; in rk3399_set_mux() local
68 mux_type = bank->iomux[iomux_num].type; in rk3399_set_mux()
70 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3399_set_mux()
A Dpinctrl-rockchip-core.c89 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask) in rockchip_get_mux_data() argument
93 if (mux_type & IOMUX_WIDTH_4BIT) { in rockchip_get_mux_data()
98 } else if (mux_type & IOMUX_WIDTH_3BIT) { in rockchip_get_mux_data()
121 int reg, ret, mask, mux_type; in rockchip_get_mux() local
139 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
141 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rockchip_get_mux()
A Dpinctrl-rk3328.c131 int reg, ret, mask, mux_type; in rk3328_set_mux() local
139 mux_type = bank->iomux[iomux_num].type; in rk3328_set_mux()
141 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3328_set_mux()
A Dpinctrl-px30.c81 int reg, ret, mask, mux_type; in px30_set_mux() local
89 mux_type = bank->iomux[iomux_num].type; in px30_set_mux()
91 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in px30_set_mux()
A Dpinctrl-rk3308.c259 int reg, ret, mask, mux_type; in rk3308_set_mux() local
267 mux_type = bank->iomux[iomux_num].type; in rk3308_set_mux()
269 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3308_set_mux()
A Dpinctrl-rockchip.h294 int rockchip_get_mux_data(int mux_type, int pin, u8 *bit, int *mask);

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