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Searched refs:mxc_pll_reg (Results 1 – 2 of 2) sorted by relevance

/u-boot/arch/arm/mach-imx/mx5/
A Dclock.c30 struct mxc_pll_reg *mxc_plls[PLL_CLOCKS] = {
31 [PLL1_CLOCK] = (struct mxc_pll_reg *)PLL1_BASE_ADDR,
32 [PLL2_CLOCK] = (struct mxc_pll_reg *)PLL2_BASE_ADDR,
33 [PLL3_CLOCK] = (struct mxc_pll_reg *)PLL3_BASE_ADDR,
35 [PLL4_CLOCK] = (struct mxc_pll_reg *)PLL4_BASE_ADDR,
162 static uint32_t decode_pll(struct mxc_pll_reg *pll, uint32_t infreq) in decode_pll()
650 struct mxc_pll_reg *pll = mxc_plls[index]; in config_pll_clk()
/u-boot/arch/arm/include/asm/arch-mx5/
A Dcrm_regs.h12 struct mxc_pll_reg { struct

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