Home
last modified time | relevance | path

Searched refs:nand_clk (Results 1 – 3 of 3) sorted by relevance

/u-boot/drivers/mtd/nand/raw/
A Dpxa3xx_nand.c455 NDTR0_tCS(ns2cycle(t->tCS, nand_clk)) | in pxa3xx_nand_set_timing()
456 NDTR0_tWH(ns2cycle(t->tWH, nand_clk)) | in pxa3xx_nand_set_timing()
457 NDTR0_tWP(ns2cycle(t->tWP, nand_clk)) | in pxa3xx_nand_set_timing()
458 NDTR0_tRH(ns2cycle(t->tRH, nand_clk)) | in pxa3xx_nand_set_timing()
459 NDTR0_tRP(ns2cycle(t->tRP, nand_clk)); in pxa3xx_nand_set_timing()
463 NDTR1_tAR(ns2cycle(t->tAR, nand_clk)); in pxa3xx_nand_set_timing()
494 NDTR0_tCS(ns2cycle(tCS_min, nand_clk)) | in pxa3xx_nand_set_sdr_timing()
495 NDTR0_tWH(ns2cycle(tWH_min, nand_clk)) | in pxa3xx_nand_set_sdr_timing()
496 NDTR0_tWP(ns2cycle(tWP_min, nand_clk)) | in pxa3xx_nand_set_sdr_timing()
498 NDTR0_tRP(ns2cycle(tRP_min, nand_clk)); in pxa3xx_nand_set_sdr_timing()
[all …]
/u-boot/arch/arm/dts/
A Dsocfpga.dtsi482 nand_clk: nand_clk { label
756 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
A Dsocfpga_arria10.dtsi385 nand_clk: nand_clk { label
673 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;

Completed in 8 milliseconds