Searched refs:nf (Results 1 – 4 of 4) sorted by relevance
| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3188.c | 43 u32 nf; member
111 rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1); in rkclk_set_pll()
128 {.nf = 75, .nr = 1, .no = 6}, in rkclk_configure_ddr()
129 {.nf = 400, .nr = 9, .no = 2}, in rkclk_configure_ddr()
130 {.nf = 500, .nr = 9, .no = 2}, in rkclk_configure_ddr()
131 {.nf = 100, .nr = 3, .no = 1}, in rkclk_configure_ddr()
174 {.nf = 50, .nr = 1, .no = 2}, in rkclk_configure_cpu()
175 {.nf = 67, .nr = 1, .no = 1}, in rkclk_configure_cpu()
233 uint32_t nr, no, nf; in rkclk_pll_get_rate() local
254 nf = ((con >> CLKF_SHIFT) & CLKF_MASK) + 1; in rkclk_pll_get_rate()
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| A D | clk_rk3288.c | 43 u32 nf; member
186 {.nf = 25, .nr = 2, .no = 1}, in rkclk_configure_ddr()
187 {.nf = 400, .nr = 9, .no = 2}, in rkclk_configure_ddr()
188 {.nf = 500, .nr = 9, .no = 2}, in rkclk_configure_ddr()
189 {.nf = 100, .nr = 3, .no = 1}, in rkclk_configure_ddr()
279 nf = vco_khz / fref_khz; in pll_para_config()
280 if (nf >= max_nf) in pll_para_config()
282 diff_khz = vco_khz - nf * fref_khz; in pll_para_config()
284 nf++; in pll_para_config()
293 div->nf = nf; in pll_para_config()
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| A D | clk_rk3368.c | 36 u32 nf; member
49 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
69 uint32_t nr, no, nf; in rkclk_pll_get_rate() local
83 nf = ((con & PLL_NF_MASK) >> PLL_NF_SHIFT) + 1; in rkclk_pll_get_rate()
85 return (24 * nf / (nr * no)) * 1000000; in rkclk_pll_get_rate()
98 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll()
102 pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
111 writel((div->nf - 1) << PLL_NF_SHIFT, &pll->con1); in rkclk_set_pll()
116 clrsetbits_le32(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1); in rkclk_set_pll()
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | clock.h | 67 unsigned int nf; member
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