| /u-boot/drivers/adc/ |
| A D | rockchip-saradc.c | 33 int num_channels; member
72 if (channel < 0 || channel >= priv->data->num_channels) { in rockchip_saradc_start_channel()
137 uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1; in rockchip_saradc_of_to_plat()
150 .num_channels = 3,
156 .num_channels = 2,
162 .num_channels = 6,
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| A D | stm32-adc.c | 170 unsigned int i, num_channels; in stm32_adc_chan_of_init() local
179 num_channels = ret / sizeof(u32); in stm32_adc_chan_of_init()
181 if (num_channels > adc->cfg->max_channels) { in stm32_adc_chan_of_init()
182 dev_err(dev, "too many st,adc-channels: %d\n", num_channels); in stm32_adc_chan_of_init()
186 ret = dev_read_u32_array(dev, "st,adc-channels", chans, num_channels); in stm32_adc_chan_of_init()
192 for (i = 0; i < num_channels; i++) { in stm32_adc_chan_of_init()
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| /u-boot/arch/x86/include/asm/ |
| A D | acpi_nhlt.h | 109 int num_channels, int sample_freq_khz,
223 u16 num_channels; member
244 int num_channels; member
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| /u-boot/arch/x86/lib/ |
| A D | acpi_nhlt.c | 109 int num_channels, int sample_freq_khz, in nhlt_add_format() argument
124 wave->num_channels = num_channels; in nhlt_add_format()
135 wave->block_align = wave->num_channels * wave->bits_per_sample / 8; in nhlt_add_format()
165 fmt = nhlt_add_format(endp, cfg->num_channels, in nhlt_endpoint_add_formats()
210 sz += sizeof(fmt->waveform.num_channels); in calc_format_size()
329 ser16(cur, wave->num_channels); in serialise_waveform()
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| /u-boot/drivers/crypto/fsl/ |
| A D | sec.c | 22 u32 num_channels; in fdt_fixup_crypto_node() member
63 sec_rev_prop_list[sec_idx].num_channels); in fdt_fixup_crypto_node()
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| /u-boot/arch/x86/cpu/apollolake/ |
| A D | hostbridge.c | 49 .num_channels = 1,
81 .num_channels = 2,
113 .num_channels = 4,
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| /u-boot/drivers/ram/rockchip/ |
| A D | sdram-px30-ddr3-detect-333.inc | 29 .num_channels = 1,
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| A D | sdram-px30-ddr4-detect-333.inc | 29 .num_channels = 1,
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| A D | sdram-px30-lpddr2-detect-333.inc | 29 .num_channels = 1,
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| A D | sdram-px30-lpddr3-detect-333.inc | 29 .num_channels = 1,
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| A D | sdram_rk3288.c | 58 int num_channels; member
601 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
602 for (chan = 0; chan < sdram_params->num_channels; chan++) { in dram_all_config()
638 sdram_params->num_channels = 1; in sdram_rank_bw_detect()
754 long cap = sdram_params->num_channels * (1u << in sdram_get_stride()
981 params->num_channels = 2; in rk3288_dmc_of_to_plat()
1030 plat->num_channels = 2; in conv_of_plat()
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| A D | sdram_rk3188.c | 55 int num_channels; member
543 sys_reg |= (sdram_params->num_channels - 1) << SYS_REG_NUM_CH_SHIFT; in dram_all_config()
544 for (chan = 0; chan < sdram_params->num_channels; chan++) { in dram_all_config()
824 params->num_channels = 1; in rk3188_dmc_of_to_plat()
868 plat->num_channels = 1; in conv_of_plat()
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| A D | sdram_rk322x.c | 50 int num_channels; member
725 params->num_channels = 1; in rk322x_dmc_of_to_plat()
770 plat->num_channels = 1; in conv_of_plat()
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| A D | sdram_common.c | 187 *p_os_reg2 |= SYS_REG_ENC_NUM_CH(base->num_channels); in sdram_org_config()
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| A D | sdram_rk3399.c | 1502 (idx < params->base.num_channels) && (channel < 2); in dram_all_config()
1651 u32 ch_count = params->base.num_channels; in switch_to_phy_index1()
2795 if (params->base.num_channels == 1) { in calculate_stride()
2958 params->base.num_channels = 0; in sdram_init()
2968 params->base.num_channels++; in sdram_init()
2998 if (params->base.num_channels == 0) { in sdram_init()
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| A D | sdram-rk3399-lpddr4-400.inc | 79 .num_channels = 2,
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| A D | sdram-rk3399-lpddr4-800.inc | 79 .num_channels = 2,
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| /u-boot/arch/x86/cpu/tangier/ |
| A D | acpi.c | 94 si->num_channels = 8; in acpi_fill_csrt_dma()
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| /u-boot/drivers/sound/ |
| A D | max98357a.c | 100 .num_channels = 2,
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| A D | da7219.c | 114 .num_channels = 2,
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| /u-boot/drivers/usb/host/ |
| A D | dwc2.c | 252 int i, ret, num_channels; in dwc_otg_core_host_init() local
294 num_channels = readl(®s->ghwcfg2); in dwc_otg_core_host_init()
295 num_channels &= DWC2_HWCFG2_NUM_HOST_CHAN_MASK; in dwc_otg_core_host_init()
296 num_channels >>= DWC2_HWCFG2_NUM_HOST_CHAN_OFFSET; in dwc_otg_core_host_init()
297 num_channels += 1; in dwc_otg_core_host_init()
299 for (i = 0; i < num_channels; i++) in dwc_otg_core_host_init()
305 for (i = 0; i < num_channels; i++) { in dwc_otg_core_host_init()
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| /u-boot/arch/arm/include/asm/arch-rockchip/ |
| A D | sdram_common.h | 43 unsigned int num_channels; member
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| /u-boot/include/acpi/ |
| A D | acpi_table.h | 393 u8 num_channels; member
|