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/u-boot/arch/x86/cpu/apollolake/
A Dfsp_bindings.c219 &cfg[fspb->offset]); in fsp_update_config_from_dtb()
223 (u16 *)&cfg[fspb->offset]); in fsp_update_config_from_dtb()
229 (u32 *)&cfg[fspb->offset]); in fsp_update_config_from_dtb()
233 (u64 *)&cfg[fspb->offset]); in fsp_update_config_from_dtb()
239 (char *)&cfg[fspb->offset]); in fsp_update_config_from_dtb()
243 &cfg[fspb->offset]); in fsp_update_config_from_dtb()
503 .offset = offsetof(struct fsp_m_config,
1172 .offset = offsetof(struct fsp_s_config,
1189 .offset = offsetof(struct fsp_s_config,
1229 .offset = offsetof(struct fsp_s_config,
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/u-boot/drivers/misc/
A Dp2sb-uclass.c41 reg_addr += offset; in pcr_reg_address()
57 assert(IS_ALIGNED(offset, align)); in check_pcr_offset_align()
109 write_completion(dev, offset); in pcr_write32()
119 write_completion(dev, offset); in pcr_write16()
129 write_completion(dev, offset); in pcr_write8()
136 data32 = pcr_read32(dev, offset); in pcr_clrsetbits32()
139 pcr_write32(dev, offset, data32); in pcr_clrsetbits32()
146 data16 = pcr_read16(dev, offset); in pcr_clrsetbits16()
149 pcr_write16(dev, offset, data16); in pcr_clrsetbits16()
156 data8 = pcr_read8(dev, offset); in pcr_clrsetbits8()
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/u-boot/scripts/dtc/libfdt/
A Dfdt.c137 if (offset < 0) in fdt_offset_ptr()
189 offset += 4; in fdt_next_tag()
211 if ((offset < 0) || (offset % FDT_TAGSIZE) in fdt_check_node_offset_()
215 return offset; in fdt_check_node_offset_()
220 if ((offset < 0) || (offset % FDT_TAGSIZE) in fdt_check_prop_offset_()
221 || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)) in fdt_check_prop_offset_()
224 return offset; in fdt_check_prop_offset_()
264 return offset; in fdt_next_node()
271 offset = fdt_next_node(fdt, offset, &depth); in fdt_first_subnode()
275 return offset; in fdt_first_subnode()
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A Dfdt_ro.c122 offset = fdt_next_node(fdt, offset, NULL); in fdt_find_max_phandle()
234 offset = fdt_next_node(fdt, offset, &depth)) in fdt_subnode_offset_namelen()
341 int offset; in fdt_first_property_offset() local
554 (offset >= 0) && (offset <= nodeoffset); in fdt_get_path()
555 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_get_path()
586 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) in fdt_get_path()
606 (offset >= 0) && (offset <= nodeoffset); in fdt_supernode_atdepth_offset()
607 offset = fdt_next_node(fdt, offset, &depth)) { in fdt_supernode_atdepth_offset()
670 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_prop_value()
697 offset = fdt_next_node(fdt, offset, NULL)) { in fdt_node_offset_by_phandle()
[all …]
/u-boot/drivers/pinctrl/rockchip/
A Dpinctrl-rockchip.h41 int offset; member
75 int offset; member
109 { .offset = -1 }, \
110 { .offset = -1 }, \
111 { .offset = -1 }, \
112 { .offset = -1 }, \
135 { .offset = -1 }, \
136 { .offset = -1 }, \
137 { .offset = -1 }, \
138 { .offset = -1 }, \
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/u-boot/include/
A Dp2sb.h79 uint pcr_read32(struct udevice *dev, uint offset);
80 uint pcr_read16(struct udevice *dev, uint offset);
81 uint pcr_read8(struct udevice *dev, uint offset);
94 void pcr_write8(struct udevice *dev, uint offset, uint data);
116 return pcr_clrsetbits32(dev, offset, 0, set); in pcr_setbits32()
121 return pcr_clrsetbits16(dev, offset, 0, set); in pcr_setbits16()
126 return pcr_clrsetbits8(dev, offset, 0, set); in pcr_setbits8()
131 return pcr_clrsetbits32(dev, offset, clr, 0); in pcr_clrbits32()
136 return pcr_clrsetbits16(dev, offset, clr, 0); in pcr_clrbits16()
141 return pcr_clrsetbits8(dev, offset, clr, 0); in pcr_clrbits8()
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/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dfsl_epu.c173 u32 offset; in fsl_epu_clean() local
177 for (offset = EPACR0; offset <= EPACR15; offset += EPACR_STRIDE) in fsl_epu_clean()
178 out_be32(epu_base + offset, 0); in fsl_epu_clean()
181 for (offset = EPEVTCR0; offset <= EPEVTCR9; offset += EPEVTCR_STRIDE) in fsl_epu_clean()
182 out_be32(epu_base + offset, 0); in fsl_epu_clean()
188 for (offset = EPSMCR0; offset <= EPSMCR15; offset += EPSMCR_STRIDE) in fsl_epu_clean()
192 for (offset = EPCCR0; offset <= EPCCR31; offset += EPCCR_STRIDE) in fsl_epu_clean()
196 for (offset = EPCMPR0; offset <= EPCMPR31; offset += EPCMPR_STRIDE) in fsl_epu_clean()
200 for (offset = EPCTR0; offset <= EPCTR31; offset += EPCTR_STRIDE) in fsl_epu_clean()
204 for (offset = EPIMCR0; offset <= EPIMCR31; offset += EPIMCR_STRIDE) in fsl_epu_clean()
[all …]
/u-boot/arch/arm/cpu/armv8/
A Dspin_table.c13 int cpus_offset, offset; in spin_table_update_dt() local
24 for (offset = fdt_first_subnode(fdt, cpus_offset); in spin_table_update_dt()
25 offset >= 0; in spin_table_update_dt()
26 offset = fdt_next_subnode(fdt, offset)) { in spin_table_update_dt()
27 prop = fdt_getprop(fdt, offset, "device_type", NULL); in spin_table_update_dt()
36 prop = fdt_getprop(fdt, offset, "enable-method", NULL); in spin_table_update_dt()
41 for (offset = fdt_first_subnode(fdt, cpus_offset); in spin_table_update_dt()
42 offset >= 0; in spin_table_update_dt()
43 offset = fdt_next_subnode(fdt, offset)) { in spin_table_update_dt()
44 prop = fdt_getprop(fdt, offset, "device_type", NULL); in spin_table_update_dt()
[all …]
/u-boot/drivers/usb/musb-new/
A Dmusb_io.h46 { return __raw_readw(addr + offset); } in musb_readw()
49 { return __raw_readl(addr + offset); } in musb_readl()
53 { __raw_writew(data, addr + offset); } in musb_writew()
56 { __raw_writel(data, addr + offset); } in musb_writel()
69 tmp = __raw_readw(addr + (offset & ~1)); in musb_readb()
70 if (offset & 1) in musb_readb()
82 tmp = __raw_readw(addr + (offset & ~1)); in musb_writeb()
83 if (offset & 1) in musb_writeb()
88 __raw_writew(tmp, addr + (offset & ~1)); in musb_writeb()
94 { return __raw_readb(addr + offset); } in musb_readb()
[all …]
/u-boot/board/armltd/vexpress/
A Dvexpress_tc2.c41 int offset, tmp, len; in ft_board_setup() local
52 offset = fdt_path_offset(fdt, "/cpus"); in ft_board_setup()
53 if (offset < 0) { in ft_board_setup()
55 return offset; in ft_board_setup()
59 for (tmp = fdt_first_subnode(fdt, offset); tmp >= 0; in ft_board_setup()
64 offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible", in ft_board_setup()
66 while (offset > 0) { in ft_board_setup()
67 prop = fdt_get_property(fdt, offset, "interface-type", in ft_board_setup()
76 fdt_setprop_string(fdt, offset, "status", "disabled"); in ft_board_setup()
78 offset = fdt_node_offset_by_prop_value(fdt, offset, "compatible", in ft_board_setup()
/u-boot/drivers/pinctrl/mscc/
A Dmscc-common.c30 if (offset < 32) in mscc_writel()
38 if (offset < 32) in mscc_readl()
46 if (offset < 32) in mscc_setbits()
54 if (offset < 32) in mscc_clrbits()
94 int f, offset, regoff; in mscc_pinmux_set_mux() local
106 offset = pin->pin; in mscc_pinmux_set_mux()
108 if (offset >= 32) { in mscc_pinmux_set_mux()
109 offset = offset % 32; in mscc_pinmux_set_mux()
185 BIT(offset % 32)) in mscc_gpio_get()
200 mscc_writel(offset, in mscc_gpio_set()
[all …]
/u-boot/drivers/gpio/
A Dsandbox.c34 if (offset >= uc_priv->gpio_count) { in get_gpio_dir_flags()
40 return &state[offset].dir_flags; in get_gpio_dir_flags()
93 return *get_gpio_dir_flags(dev, offset); in sandbox_gpio_get_dir_flags()
99 *get_gpio_dir_flags(dev, offset) = flags; in sandbox_gpio_set_dir_flags()
111 debug("%s: offset:%u\n", __func__, offset); in sb_gpio_direction_input()
129 debug("%s: offset:%u\n", __func__, offset); in sb_gpio_get_value()
131 return sandbox_gpio_get_value(dev, offset); in sb_gpio_get_value()
141 offset); in sb_gpio_set_value()
161 desc->offset = args->args[0]; in sb_gpio_xlate()
219 gpio->pins[0] = desc->offset; in sb_gpio_get_acpi()
[all …]
A Dintel_ich6_gpio.c70 val |= (1UL << offset); in _ich6_gpio_set_value()
72 val &= ~(1UL << offset); in _ich6_gpio_set_value()
86 val |= (1UL << offset); in _ich6_gpio_set_direction()
90 val &= ~(1UL << offset); in _ich6_gpio_set_direction()
101 int offset; in gpio_ich6_of_to_plat() local
109 if (offset == -1) { in gpio_ich6_of_to_plat()
113 plat->offset = offset; in gpio_ich6_of_to_plat()
114 plat->base_addr = gpiobase + offset; in gpio_ich6_of_to_plat()
157 if (!(tmplong & (1UL << offset))) { in ich6_gpio_request()
159 offset); in ich6_gpio_request()
[all …]
A Dsifive-gpio.c41 u32 bit = BIT(offset); in sifive_update_gpio_reg()
55 if (offset > uc_priv->gpio_count) in sifive_gpio_direction_input()
71 if (offset > uc_priv->gpio_count) in sifive_gpio_direction_output()
91 if (offset > uc_priv->gpio_count) in sifive_gpio_get_value()
95 dir = !(readl(plat->base + GPIO_OUTPUT_EN) & BIT(offset)); in sifive_gpio_get_value()
98 val = readl(plat->base + GPIO_INPUT_VAL) & BIT(offset); in sifive_gpio_get_value()
100 val = readl(plat->base + GPIO_OUTPUT_VAL) & BIT(offset); in sifive_gpio_get_value()
110 if (offset > uc_priv->gpio_count) in sifive_gpio_set_value()
124 if (offset > uc_priv->gpio_count) in sifive_gpio_get_function()
128 outdir = readl(plat->base + GPIO_OUTPUT_EN) & BIT(offset); in sifive_gpio_get_function()
[all …]
A Dintel_broadwell_gpio.c34 int offset; member
37 static int broadwell_gpio_request(struct udevice *dev, unsigned offset, in broadwell_gpio_request() argument
51 if (!(val & (1UL << offset))) { in broadwell_gpio_request()
65 setio_32(&regs->config[priv->offset + offset], CONFA_DIR_INPUT); in broadwell_gpio_direction_input()
75 return inl(&regs->config[priv->offset + offset]) & CONFA_LEVEL_HIGH ? in broadwell_gpio_get_value()
87 clrsetio_32(&regs->config[priv->offset + offset], CONFA_OUTPUT_HIGH, in broadwell_gpio_set_value()
99 broadwell_gpio_set_value(dev, offset, value); in broadwell_gpio_direction_output()
100 clrio_32(&regs->config[priv->offset + offset], CONFA_DIR_INPUT); in broadwell_gpio_direction_output()
109 u32 mask = 1UL << offset; in broadwell_gpio_get_function()
113 if (inl(&regs->config[priv->offset + offset]) & CONFA_DIR_INPUT) in broadwell_gpio_get_function()
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A Dgpio-rcar.c44 const u32 bit = BIT(offset); in rcar_gpio_get_value()
62 setbits_le32(priv->regs + GPIO_OUTDT, BIT(offset)); in rcar_gpio_set_value()
79 clrbits_le32(regs + GPIO_POSNEG, BIT(offset)); in rcar_gpio_set_direction()
82 clrbits_le32(regs + GPIO_IOINTSEL, BIT(offset)); in rcar_gpio_set_direction()
86 setbits_le32(regs + GPIO_INOUTSEL, BIT(offset)); in rcar_gpio_set_direction()
88 clrbits_le32(regs + GPIO_INOUTSEL, BIT(offset)); in rcar_gpio_set_direction()
95 rcar_gpio_set_direction(priv->regs, offset, false); in rcar_gpio_direction_input()
106 rcar_gpio_set_value(dev, offset, value); in rcar_gpio_direction_output()
107 rcar_gpio_set_direction(priv->regs, offset, true); in rcar_gpio_direction_output()
125 return pinctrl_gpio_request(dev, offset); in rcar_gpio_request()
[all …]
A Dbcm6345_gpio.c22 static int bcm6345_gpio_get_value(struct udevice *dev, unsigned offset) in bcm6345_gpio_get_value() argument
26 return !!(readl(priv->reg_data) & BIT(offset)); in bcm6345_gpio_get_value()
29 static int bcm6345_gpio_set_value(struct udevice *dev, unsigned offset, in bcm6345_gpio_set_value() argument
35 setbits_32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
37 clrbits_32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
46 clrbits_32(dirout, BIT(offset)); in bcm6345_gpio_set_direction()
48 setbits_32(dirout, BIT(offset)); in bcm6345_gpio_set_direction()
57 return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 1); in bcm6345_gpio_direction_input()
65 bcm6345_gpio_set_value(dev, offset, value); in bcm6345_gpio_direction_output()
67 return bcm6345_gpio_set_direction(priv->reg_dirout, offset, 0); in bcm6345_gpio_direction_output()
[all …]
A Dimx_rgpio2p.c33 static int imx_rgpio2p_is_output(struct gpio_regs *regs, int offset) in imx_rgpio2p_is_output() argument
39 return val & (1 << offset) ? 1 : 0; in imx_rgpio2p_is_output()
51 l |= 1 << offset; in imx_rgpio2p_bank_direction()
54 l &= ~(1 << offset); in imx_rgpio2p_bank_direction()
63 writel((1 << offset), &regs->gpio_psor); in imx_rgpio2p_bank_set_value()
65 writel((1 << offset), &regs->gpio_pcor); in imx_rgpio2p_bank_set_value()
70 return (readl(&regs->gpio_pdir) >> offset) & 0x01; in imx_rgpio2p_bank_get_value()
89 imx_rgpio2p_bank_set_value(bank->regs, offset, value); in imx_rgpio2p_direction_output()
101 return imx_rgpio2p_bank_get_value(bank->regs, offset); in imx_rgpio2p_get_value()
109 imx_rgpio2p_bank_set_value(bank->regs, offset, value); in imx_rgpio2p_set_value()
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/u-boot/include/dt-bindings/clock/
A Dam3.h17 #define AM3_CLKCTRL_INDEX(offset) ((offset) - AM3_CLKCTRL_OFFSET) argument
23 #define AM3_L4_PER_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_PER_CLKCTRL_OFFSET) argument
78 #define AM3_L4_WKUP_CLKCTRL_INDEX(offset) ((offset) - AM3_L4_WKUP_CLKCTRL_OFFSET) argument
94 #define AM3_MPU_CLKCTRL_INDEX(offset) ((offset) - AM3_MPU_CLKCTRL_OFFSET) argument
102 #define AM3_GFX_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_GFX_L3_CLKCTRL_OFFSET) argument
114 #define AM3_L4LS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4LS_CLKCTRL_OFFSET) argument
149 #define AM3_L3S_CLKCTRL_INDEX(offset) ((offset) - AM3_L3S_CLKCTRL_OFFSET) argument
158 #define AM3_L3_CLKCTRL_INDEX(offset) ((offset) - AM3_L3_CLKCTRL_OFFSET) argument
172 #define AM3_L4HS_CLKCTRL_INDEX(offset) ((offset) - AM3_L4HS_CLKCTRL_OFFSET) argument
185 #define AM3_LCDC_CLKCTRL_INDEX(offset) ((offset) - AM3_LCDC_CLKCTRL_OFFSET) argument
[all …]
/u-boot/drivers/pinctrl/
A Dpinctrl-stmfx.c59 #define get_reg(offset) ((offset) / NR_GPIOS_PER_REG) argument
60 #define get_shift(offset) ((offset) % NR_GPIOS_PER_REG) argument
61 #define get_mask(offset) (BIT(get_shift(offset))) argument
79 u8 reg = reg_base + get_reg(offset); in stmfx_read_reg()
80 u32 mask = get_mask(offset); in stmfx_read_reg()
93 u8 reg = reg_base + get_reg(offset); in stmfx_write_reg()
94 u32 mask = get_mask(offset); in stmfx_write_reg()
135 u32 mask = get_mask(offset); in stmfx_gpio_set()
210 ret = stmfx_conf_get_type(dev, offset); in stmfx_gpio_get_dir_flags()
216 ret = stmfx_gpio_get(dev, offset); in stmfx_gpio_get_dir_flags()
[all …]
/u-boot/arch/arm/mach-imx/imx8/
A Dfdt.c54 int offset = 0, depth = 0; in update_fdt_with_owned_resources() local
58 for (offset = fdt_next_node(blob, offset, &depth); offset > 0; in update_fdt_with_owned_resources()
59 offset = fdt_next_node(blob, offset, &depth)) { in update_fdt_with_owned_resources()
65 fdt_get_name(blob, offset, NULL)); in update_fdt_with_owned_resources()
71 fdt_get_name(blob, offset, NULL)); in update_fdt_with_owned_resources()
92 rc = disable_fdt_node(blob, offset); in update_fdt_with_owned_resources()
178 int offset, proplen, i, ret; in config_smmu_fdt() local
185 if (offset > 0 && prop) { in config_smmu_fdt()
211 offset = 0; in config_smmu_fdt()
212 while ((offset = fdt_next_node(blob, offset, NULL)) > 0) { in config_smmu_fdt()
[all …]
/u-boot/drivers/video/meson/
A Dsimplefb_common.c14 int offset, ret; in meson_simplefb_fdt_match() local
17 offset = fdt_node_offset_by_compatible(blob, -1, in meson_simplefb_fdt_match()
19 while (offset >= 0) { in meson_simplefb_fdt_match()
20 ret = fdt_stringlist_search(blob, offset, "amlogic,pipeline", in meson_simplefb_fdt_match()
24 offset = fdt_node_offset_by_compatible(blob, offset, in meson_simplefb_fdt_match()
28 return offset; in meson_simplefb_fdt_match()
/u-boot/drivers/video/sunxi/
A Dsimplefb_common.c14 int offset, ret; in sunxi_simplefb_fdt_match() local
17 offset = fdt_node_offset_by_compatible(blob, -1, in sunxi_simplefb_fdt_match()
19 while (offset >= 0) { in sunxi_simplefb_fdt_match()
20 ret = fdt_stringlist_search(blob, offset, "allwinner,pipeline", in sunxi_simplefb_fdt_match()
24 offset = fdt_node_offset_by_compatible(blob, offset, in sunxi_simplefb_fdt_match()
28 return offset; in sunxi_simplefb_fdt_match()
/u-boot/lib/
A Dtpm-common.c26 size_t offset = 0, length = 0; in pack_byte_string() local
34 offset = va_arg(args, size_t); in pack_byte_string()
39 offset = va_arg(args, size_t); in pack_byte_string()
44 offset = va_arg(args, size_t); in pack_byte_string()
49 offset = va_arg(args, size_t); in pack_byte_string()
59 if (offset + length > size) { in pack_byte_string()
66 str[offset] = value; in pack_byte_string()
87 size_t offset = 0, length = 0; in unpack_byte_string() local
121 if (offset + length > size) { in unpack_byte_string()
124 size, offset, length); in unpack_byte_string()
[all …]
/u-boot/common/
A Dfdt_region.c56 int offset; in fdt_find_regions() local
70 stop_at = offset; in fdt_find_regions()
132 offset == region[count - 1].offset + in fdt_find_regions()
181 reg && offset <= reg->offset + reg->size) { in fdt_add_region()
182 reg->size = offset + size - reg->offset; in fdt_add_region()
186 reg->offset = offset; in fdt_add_region()
204 if (target >= reg->offset && target < reg->offset + reg->size) in region_list_contains_offset()
266 offset = fdt_next_property_offset(fdt, offset)) { in fdt_add_alias_regions()
284 fdt_add_region(info, base + offset, next - offset); in fdt_add_alias_regions()
489 int offset; in fdt_next_region() local
[all …]

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