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Searched refs:out_8 (Results 1 – 25 of 77) sorted by relevance

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/u-boot/arch/m68k/cpu/mcf5445x/
A Dcpu_init.c77 out_8(&gpio->par_dspi, in cfspi_port_conf()
92 out_8(&pm->pmcr0, 23); in cfspi_port_conf()
121 out_8(&gpio->par_be, in cpu_init_f()
126 out_8(&pm->pmcr0, 17); in cpu_init_f()
129 out_8(&pm->pmcr0, 18); in cpu_init_f()
130 out_8(&pm->pmcr0, 19); in cpu_init_f()
131 out_8(&pm->pmcr0, 20); in cpu_init_f()
134 out_8(&pm->pmcr0, 22); in cpu_init_f()
135 out_8(&pm->pmcr1, 4); in cpu_init_f()
136 out_8(&pm->pmcr1, 7); in cpu_init_f()
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/u-boot/arch/m68k/cpu/mcf530x/
A Dcpu_init.c110 out_8(&sim->sypcr, 0x00); in cpu_init_f()
111 out_8(&sim->swivr, 0x0f); in cpu_init_f()
112 out_8(&sim->swsr, 0x00); in cpu_init_f()
113 out_8(&sim->mpark, 0x00); in cpu_init_f()
120 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f()
121 out_8(&icr->icr1, 0x00); /* timer 1 */ in cpu_init_f()
122 out_8(&icr->icr2, 0x88); /* timer 2 */ in cpu_init_f()
123 out_8(&icr->icr3, 0x00); /* i2c */ in cpu_init_f()
124 out_8(&icr->icr4, 0x00); /* uart 0 */ in cpu_init_f()
125 out_8(&icr->icr5, 0x00); /* uart 1 */ in cpu_init_f()
[all …]
A Dinterrupts.c27 out_8(&icr->icr2, CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
/u-boot/board/freescale/m5253demo/
A Dm5253demo.c115 out_8(&ata->cr, 0); in ide_set_reset()
124 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset()
125 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset()
126 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset()
127 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset()
128 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset()
129 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
130 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset()
133 out_8(&ata->cr, 0x40); in ide_set_reset()
/u-boot/arch/m68k/cpu/mcf547x_8x/
A Dcpu.c33 out_8(&gptmr->mode, GPT_TMS_SGPIO); in do_reset()
34 out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE); in do_reset()
106 out_8(&gptmr->ocpw, 0xa5); in hw_watchdog_reset()
114 out_8(&gptmr->mode, 0); in watchdog_disable()
115 out_8(&gptmr->ctrl, 0); in watchdog_disable()
129 out_8(&gptmr->mode, GPT_TMS_SGPIO); in watchdog_init()
130 out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN); in watchdog_init()
A Dcpu_init.c112 out_8(&gpio->par_psc0, GPIO_PAR_PSC0_TXD0 | GPIO_PAR_PSC0_RXD0); in uart_port_conf()
115 out_8(&gpio->par_psc1, GPIO_PAR_PSC1_TXD1 | GPIO_PAR_PSC1_RXD1); in uart_port_conf()
118 out_8(&gpio->par_psc2, GPIO_PAR_PSC2_TXD2 | GPIO_PAR_PSC2_RXD2); in uart_port_conf()
121 out_8(&gpio->par_psc3, GPIO_PAR_PSC3_TXD3 | GPIO_PAR_PSC3_RXD3); in uart_port_conf()
/u-boot/board/keymile/km83xx/
A Dkm83xx_i2c.c20 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_write_start_seq()
22 out_8(&base->cr, (I2C_CR_MEN)); in i2c_write_start_seq()
36 out_8(&base->cr, (I2C_CR_MSTA)); in i2c_make_abort()
38 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_make_abort()
61 out_8(&base->cr, (I2C_CR_MEN)); in i2c_make_abort()
64 out_8(&base->sr, 0); in i2c_make_abort()
/u-boot/board/freescale/mpc8568mds/
A Dbcsr.c50 out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
51 out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
54 out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | in reset_8568mds_uccs()
58 out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
59 out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
/u-boot/board/freescale/m54455evb/
A Dm54455evb.c49 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); in dram_init()
133 out_8(&ata->cr, 0); in ide_set_reset()
140 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset()
141 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset()
142 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset()
143 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset()
144 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset()
145 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
146 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset()
149 out_8(&ata->cr, 0x40); in ide_set_reset()
/u-boot/drivers/spi/
A Dmpc8xx_spi.c124 out_8(&spi->spi_tfcr, SMC_EB); in mpc8xx_spi_probe()
125 out_8(&spi->spi_rfcr, SMC_EB); in mpc8xx_spi_probe()
140 out_8(&cp->cp_spim, 0); /* Mask all SPI events */ in mpc8xx_spi_probe()
141 out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ in mpc8xx_spi_probe()
176 out_8(&cp->cp_spim, 0); /* Mask all SPI events */ in mpc8xx_spi_xfer()
177 out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ in mpc8xx_spi_xfer()
/u-boot/drivers/serial/
A Dserial_mpc8xx.c103 out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR); in serial_mpc8xx_probe()
106 out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR); in serial_mpc8xx_probe()
132 out_8(&up->smc_rfcr, SMC_EB); in serial_mpc8xx_probe()
133 out_8(&up->smc_tfcr, SMC_EB); in serial_mpc8xx_probe()
142 out_8(&sp->smc_smcm, 0); in serial_mpc8xx_probe()
143 out_8(&sp->smc_smce, 0xff); in serial_mpc8xx_probe()
185 out_8(&rtx->txbuf, c); in serial_mpc8xx_putc()
/u-boot/board/ids/ids8313/
A Dids8313.c173 out_8(spi_base, 0); in misc_init_r()
177 out_8(&uart1->umcr, IDSUMCR_RTS_MASK); in misc_init_r()
178 out_8(&uart2->umcr, IDSUMCR_RTS_MASK); in misc_init_r()
201 out_8(spi_base, 1 << slave->cs); in spi_cs_activate()
212 out_8(spi_base, 1 << slave->cs); in spi_cs_deactivate()
/u-boot/board/freescale/common/
A Dpixis.c19 out_8(pixis_base + PIXIS_RST, 0); in pixis_reset()
88 out_8(pixis_base + PIXIS_VCLKH, vclkh); in set_px_sysclk()
89 out_8(pixis_base + PIXIS_VCLKL, vclkl); in set_px_sysclk()
91 out_8(pixis_base + PIXIS_AUX, sysclk_aux); in set_px_sysclk()
174 out_8(pixis_base + PIXIS_VCFGEN0, tmp); in read_from_px_regs()
201 out_8(pixis_base + PIXIS_VCFGEN1, tmp); in read_from_px_regs_altbank()
A Darm_sleep.c80 out_8(qixis_base + QIXIS_RST_FORCE_3, 0); in ls1_psci_resume_fixup()
85 out_8(qixis_base + QIXIS_PWR_CTL2, tmp); in ls1_psci_resume_fixup()
/u-boot/board/freescale/m5329evb/
A Dnand.c61 out_8(&gpio->pclrr_timer, 0); in board_nand_init()
62 out_8(&gpio->podr_timer, 0); in board_nand_init()
/u-boot/board/freescale/m5373evb/
A Dnand.c65 out_8(&gpio->pclrr_timer, 0); in board_nand_init()
66 out_8(&gpio->podr_timer, 0); in board_nand_init()
/u-boot/arch/m68k/cpu/mcf52x2/
A Dinterrupts.c30 out_8(&intp->int_pivr, 0x40); in interrupt_init()
71 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
A Dspeed.c26 out_8(&pll->odr, CONFIG_SYS_PLL_ODR); in get_clocks()
27 out_8(&pll->fdr, CONFIG_SYS_PLL_FDR); in get_clocks()
/u-boot/arch/arm/cpu/armv7/ls102xa/
A Dls102xa_psci.c186 out_8(qixis_base + QIXIS_CTL_SYS, tmp); in ls1_deep_sleep()
191 out_8(qixis_base + QIXIS_PWR_CTL2, tmp); in ls1_deep_sleep()
196 out_8(qixis_base + QIXIS_RST_FORCE_3, tmp); in ls1_deep_sleep()
227 out_8(qixis_base + QIXIS_CTL_SYS, tmp); in ls1_sleep()
/u-boot/board/freescale/m5235evb/
A Dm5235evb.c37 out_8(&gpio->par_ad, in dram_init()
42 out_8(&gpio->par_sdram, in dram_init()
/u-boot/arch/m68k/cpu/mcf5227x/
A Dcpu_init.c25 out_8(&gpio->par_dspi, in cfspi_port_conf()
103 out_8(&gpio->par_i2c, GPIO_PAR_I2C_SCL_SCL | GPIO_PAR_I2C_SDA_SDA); in cpu_init_f()
148 out_8(&gpio->par_dspi, in uart_port_conf()
/u-boot/board/freescale/p1_p2_rdb_pc/
A Dp1_p2_rdb_pc.c90 out_8(&cpld_data->wd_cfg, CPLD_WD_CFG); in board_cpld_init()
91 out_8(&cpld_data->status_led, CPLD_STATUS_LED); in board_cpld_init()
92 out_8(&cpld_data->fxo_led, CPLD_FXO_LED); in board_cpld_init()
93 out_8(&cpld_data->fxs_led, CPLD_FXS_LED); in board_cpld_init()
94 out_8(&cpld_data->system_rst, CPLD_SYS_RST); in board_cpld_init()
/u-boot/arch/powerpc/cpu/mpc83xx/
A Dpcie.c104 PCIE_OP(write, byte, u8, out_8) in PCIE_OP()
315 out_8(hose_cfg_base + PCI_PRIMARY_BUS, 0); in mpc83xx_pcie_init_bus()
316 out_8(hose_cfg_base + PCI_SECONDARY_BUS, 1); in mpc83xx_pcie_init_bus()
317 out_8(hose_cfg_base + PCI_SUBORDINATE_BUS, 255); in mpc83xx_pcie_init_bus()
331 out_8(hose_cfg_base + PCI_LATENCY_TIMER, 0x80); in mpc83xx_pcie_init_bus()
332 out_8(hose_cfg_base + PCI_CACHE_LINE_SIZE, 0x08); in mpc83xx_pcie_init_bus()
/u-boot/board/keymile/common/
A Dqrio.c173 out_8(qrio_base + CTRLH_OFF, ctrlh); in qrio_set_leds()
187 out_8(qrio_base + CTRLL_OFF, ctrll); in qrio_enable_app_buffer()
203 out_8(qrio_base + REASON1_OFF, reason1); in qrio_cpuwd_flag()
244 out_8(qrio_base + RSTCFG_OFF, rstcfg); in qrio_uprstreq()
/u-boot/drivers/mtd/nand/raw/
A Dkmeter1_nand.c16 #define write_mode(val) out_8(CONFIG_NAND_MODE_REG, val)
18 #define write_data(val) out_8(CONFIG_NAND_DATA_REG, val)

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