/u-boot/arch/x86/include/asm/ |
A D | intel_pinctrl_defs.h | 197 _PAD_CFG_STRUCT(pad, \ 203 _PAD_CFG_STRUCT(pad, \ 209 _PAD_CFG_STRUCT(pad, \ 216 _PAD_CFG_STRUCT(pad, \ 222 _PAD_CFG_STRUCT(pad, \ 230 _PAD_CFG_STRUCT(pad, \ 235 _PAD_CFG_STRUCT(pad, \ 242 _PAD_CFG_STRUCT(pad, \ 249 _PAD_CFG_STRUCT(pad, \ 267 _PAD_CFG_STRUCT(pad, \ [all …]
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/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
A D | iomux.c | 37 ofs += PAD_BANK(pad) * 0x20 + PAD_PIN(pad) / 16 * 0x10; in mxs_iomux_setup_pad() 38 bp = PAD_PIN(pad) % 16 * 2; in mxs_iomux_setup_pad() 47 ofs += PAD_BANK(pad) * 0x40 + PAD_PIN(pad) / 8 * 0x10; in mxs_iomux_setup_pad() 49 if (PAD_MA_VALID(pad)) { in mxs_iomux_setup_pad() 50 bp = PAD_PIN(pad) % 8 * 4; in mxs_iomux_setup_pad() 54 reg |= PAD_MA(pad) << bp; in mxs_iomux_setup_pad() 58 if (PAD_VOL_VALID(pad)) { in mxs_iomux_setup_pad() 61 if (PAD_VOL(pad)) in mxs_iomux_setup_pad() 68 if (PAD_PULL_VALID(pad)) { in mxs_iomux_setup_pad() 71 bp = PAD_PIN(pad); in mxs_iomux_setup_pad() [all …]
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/u-boot/arch/arm/include/asm/arch-mxs/ |
A D | iomux.h | 107 static inline unsigned int PAD_BANK(iomux_cfg_t pad) in PAD_BANK() argument 109 return (pad & MXS_PAD_BANK_MASK) >> MXS_PAD_BANK_SHIFT; in PAD_BANK() 112 static inline unsigned int PAD_PIN(iomux_cfg_t pad) in PAD_PIN() argument 114 return (pad & MXS_PAD_PIN_MASK) >> MXS_PAD_PIN_SHIFT; in PAD_PIN() 117 static inline unsigned int PAD_MUXSEL(iomux_cfg_t pad) in PAD_MUXSEL() argument 122 static inline unsigned int PAD_MA(iomux_cfg_t pad) in PAD_MA() argument 124 return (pad & MXS_PAD_MA_MASK) >> MXS_PAD_MA_SHIFT; in PAD_MA() 132 static inline unsigned int PAD_VOL(iomux_cfg_t pad) in PAD_VOL() argument 134 return (pad & MXS_PAD_VOL_MASK) >> MXS_PAD_VOL_SHIFT; in PAD_VOL() 142 static inline unsigned int PAD_PULL(iomux_cfg_t pad) in PAD_PULL() argument [all …]
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/u-boot/tools/binman/test/ |
A D | 180_section_pad.dts | 10 pad-byte = <0x26>; 14 /* Padding for the section uses the 0x26 pad byte */ 15 pad-before = <3>; 16 pad-after = <2>; 19 pad-byte = <0x21>; 22 pad-before = <5>; 23 pad-after = <1>;
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A D | 166_pad_in_sections.dts | 10 pad-byte = <0x26>; 12 pad-byte = <0x21>; 18 pad-before = <12>; 19 pad-after = <6>;
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A D | 055_sections.dts | 10 pad-byte = <0x26>; 15 pad-byte = <0x21>; 22 pad-byte = <0x61>;
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A D | 056_name_prefix.dts | 10 pad-byte = <0x26>; 16 pad-byte = <0x21>; 24 pad-byte = <0x61>;
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A D | 060_fdt_update.dts | 9 pad-byte = <0x26>; 15 pad-byte = <0x21>; 23 pad-byte = <0x61>;
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A D | 101_sections_offset.dts | 10 pad-byte = <0x26>; 16 pad-byte = <0x21>; 23 pad-byte = <0x61>;
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A D | 061_fdt_update_bad.dts | 9 pad-byte = <0x26>; 15 pad-byte = <0x21>; 23 pad-byte = <0x61>;
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A D | 181_section_align.dts | 10 pad-byte = <0x26>; 17 /* Padding for the section uses the 0x26 pad byte */ 22 pad-byte = <0x21>;
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/u-boot/include/ |
A D | memalign.h | 69 #define PAD_COUNT(s, pad) (((s) - 1) / (pad) + 1) argument 70 #define PAD_SIZE(s, pad) (PAD_COUNT(s, pad) * pad) argument 71 #define ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, pad) \ argument 72 char __##name[ROUND(PAD_SIZE((size) * sizeof(type), pad), align) \ 78 #define ALLOC_CACHE_ALIGN_BUFFER_PAD(type, name, size, pad) \ argument 79 ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad)
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/u-boot/arch/arc/include/asm/ |
A D | arc-bcr.h | 21 unsigned int pad:12, line_len:4, sz:4, config:4, ver:8; member 23 unsigned int ver:8, config:4, sz:4, line_len:4, pad:12; 32 unsigned int pad:24, way:2, lsz:2, sz:4; member 34 unsigned int sz:4, lsz:2, way:2, pad:24; 43 unsigned int pad:24, ver:8; member 45 unsigned int ver:8, pad:24; 54 unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8; member 56 unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
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/u-boot/tools/ |
A D | imx8m_image.sh | 25 …objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 lpddr4_pmu_train_1d_imem.bin lpddr4_pmu… 26 …objcopy -I binary -O binary --pad-to 0x4000 --gap-fill=0x0 lpddr4_pmu_train_1d_dmem.bin lpddr4_pmu… 27 …objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 lpddr4_pmu_train_2d_imem.bin lpddr4_pmu… 30 dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin bs=4 conv=sync 31 …cat spl/u-boot-spl-pad.bin lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-… 35 objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 ddr4_imem_1d.bin ddr4_imem_1d_pad.bin 36 objcopy -I binary -O binary --pad-to 0x4000 --gap-fill=0x0 ddr4_dmem_1d.bin ddr4_dmem_1d_pad.bin 37 objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 ddr4_imem_2d.bin ddr4_imem_2d_pad.bin 40 dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin bs=4 conv=sync 41 cat spl/u-boot-spl-pad.bin ddr4_1d_fw.bin ddr4_2d_fw.bin > spl/u-boot-spl-ddr.bin [all …]
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/u-boot/arch/arm/mach-imx/mx7ulp/ |
A D | iomux.c | 23 void mx7ulp_iomux_setup_pad(iomux_cfg_t pad) in mx7ulp_iomux_setup_pad() argument 25 u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; in mx7ulp_iomux_setup_pad() 26 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in mx7ulp_iomux_setup_pad() 28 (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT; in mx7ulp_iomux_setup_pad() 30 (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT; in mx7ulp_iomux_setup_pad() 32 u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; in mx7ulp_iomux_setup_pad() 35 pad, mux_ctrl_ofs, mux_mode, sel_input_ofs, sel_input, in mx7ulp_iomux_setup_pad()
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/u-boot/arch/arm/dts/ |
A D | zynqmp-zcu1275-revB.dts | 51 rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */ 53 txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */ 54 rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */ 55 rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */ 56 rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */ 57 rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */ 58 rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */ 59 txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */ 60 txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */ 61 txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */ [all …]
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A D | zynqmp-zcu1285-revA.dts | 232 rxc-skew-ps = <1800>; /* Skew control of RX_CLK pad output */ 234 txen-skew-ps = <900>; /* Skew control of TX_CTL pad input */ 235 rxdv-skew-ps = <0>; /* Skew control of RX_CTL pad output */ 236 rxd0-skew-ps = <0>; /* Skew control of RXD0 pad output */ 237 rxd1-skew-ps = <0>; /* Skew control of RXD1 pad output */ 238 rxd2-skew-ps = <0>; /* Skew control of RXD2 pad output */ 239 rxd3-skew-ps = <0>; /* Skew control of RXD3 pad output */ 240 txd0-skew-ps = <900>; /* Skew control of TXD0 pad input */ 241 txd1-skew-ps = <900>; /* Skew control of TXD1 pad input */ 242 txd2-skew-ps = <900>; /* Skew control of TXD2 pad input */ [all …]
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/u-boot/doc/device-tree-bindings/net/ |
A D | micrel-ksz90x1.txt | 46 - rxc-skew-ps : Skew control of RXC pad 47 - rxdv-skew-ps : Skew control of RX CTL pad 48 - txc-skew-ps : Skew control of TXC pad 49 - txen-skew-ps : Skew control of TX CTL pad 50 - rxd0-skew-ps : Skew control of RX data 0 pad 51 - rxd1-skew-ps : Skew control of RX data 1 pad 52 - rxd2-skew-ps : Skew control of RX data 2 pad 53 - rxd3-skew-ps : Skew control of RX data 3 pad 54 - txd0-skew-ps : Skew control of TX data 0 pad 55 - txd1-skew-ps : Skew control of TX data 1 pad [all …]
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/u-boot/include/net/ |
A D | ncsi-pkt.h | 40 unsigned char pad[26]; member 46 unsigned char pad[22]; member 55 unsigned char pad[22]; member 64 unsigned char pad[22]; member 72 unsigned char pad[22]; member 82 unsigned char pad[18]; member 91 unsigned char pad[18]; member 103 unsigned char pad[18]; member 112 unsigned char pad[22]; member 122 unsigned char pad[18]; member [all …]
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/u-boot/arch/arm/mach-imx/ |
A D | iomux-v3.c | 21 void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) in imx_iomux_v3_setup_pad() argument 23 u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) >> MUX_CTRL_OFS_SHIFT; in imx_iomux_v3_setup_pad() 24 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in imx_iomux_v3_setup_pad() 26 (pad & MUX_SEL_INPUT_OFS_MASK) >> MUX_SEL_INPUT_OFS_SHIFT; in imx_iomux_v3_setup_pad() 28 (pad & MUX_SEL_INPUT_MASK) >> MUX_SEL_INPUT_SHIFT; in imx_iomux_v3_setup_pad() 30 (pad & MUX_PAD_CTRL_OFS_MASK) >> MUX_PAD_CTRL_OFS_SHIFT; in imx_iomux_v3_setup_pad() 31 u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT; in imx_iomux_v3_setup_pad() 42 u32 lpsr = (pad & MUX_MODE_LPSR) >> MUX_MODE_SHIFT; in imx_iomux_v3_setup_pad()
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/u-boot/drivers/pinctrl/nxp/ |
A D | pinctrl-scu.c | 22 static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad, in imx_pinconf_scu_set() argument 32 if (!sc_rm_is_pad_owned(-1, pad)) { in imx_pinconf_scu_set() 33 debug("Pad[%u] is not owned by curr partition\n", pad); in imx_pinconf_scu_set() 41 ret = sc_pad_set(-1, pad, val); in imx_pinconf_scu_set()
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/u-boot/arch/x86/cpu/braswell/ |
A D | early_uart.c | 34 static inline uint32_t gpio_pconf0(int community, int family, int pad) in gpio_pconf0() argument 37 family * 0x400 + pad * 8; in gpio_pconf0() 40 static void gpio_select_func(int community, int family, int pad, int func) in gpio_select_func() argument 42 uint32_t pconf0_addr = gpio_pconf0(community, family, pad); in gpio_select_func()
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/u-boot/tools/binman/etype/ |
A D | u_boot_env.py | 35 pad = self.size - len(data) - 5 36 if pad < 0: 37 self.Raise("'u-boot-env' entry too small to hold data (need %#x more bytes)" % -pad) 38 data += tools.GetBytes(self.fill_value, pad)
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/u-boot/arch/arm/mach-imx/imx8/ |
A D | iomux.c | 18 void imx8_iomux_setup_pad(iomux_cfg_t pad) in imx8_iomux_setup_pad() argument 20 sc_pad_t pin_id = pad & PIN_ID_MASK; in imx8_iomux_setup_pad() 23 u32 val = (u32)((pad & MUX_PAD_CTRL_MASK) >> MUX_PAD_CTRL_SHIFT); in imx8_iomux_setup_pad()
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/u-boot/fs/zfs/ |
A D | zfs_sha256.c | 108 uint8_t pad[128]; in zio_checksum_SHA256() local 116 pad[i] = ((uint8_t *)buf)[i]; in zio_checksum_SHA256() 118 for (pad[padsize++] = 0x80; (padsize & 63) != 56; padsize++) in zio_checksum_SHA256() 119 pad[padsize] = 0; in zio_checksum_SHA256() 122 pad[padsize++] = (size << 3) >> (56 - 8 * i); in zio_checksum_SHA256() 125 SHA256Transform(H, pad + i); in zio_checksum_SHA256()
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