Searched refs:parity (Results 1 – 25 of 27) sorted by relevance
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/u-boot/include/ |
A D | usb_cdc_acm.h | 27 unsigned char parity; member
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A D | serial.h | 80 #define SERIAL_SET_PARITY(parity) \ argument 81 ((parity << SERIAL_PAR_SHIFT) & SERIAL_PAR_MASK)
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/u-boot/tools/ |
A D | mxsboot.c | 333 uint32_t parity = 0, tmp; in mx28_nand_parity_13_8() local 336 parity |= tmp << 0; in mx28_nand_parity_13_8() 339 parity |= tmp << 1; in mx28_nand_parity_13_8() 342 parity |= tmp << 2; in mx28_nand_parity_13_8() 345 parity |= tmp << 3; in mx28_nand_parity_13_8() 349 parity |= tmp << 4; in mx28_nand_parity_13_8() 351 return parity; in mx28_nand_parity_13_8()
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/u-boot/drivers/serial/ |
A D | sandbox.c | 154 u8 parity = SERIAL_GET_PARITY(serial_config); in sandbox_serial_setconfig() local 159 parity != SERIAL_PAR_NONE) in sandbox_serial_setconfig()
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A D | serial_stm32.c | 65 uint parity = SERIAL_GET_PARITY(serial_config); in stm32_serial_setconfig() local 84 switch (parity) { in stm32_serial_setconfig()
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A D | ns16550.c | 436 uint parity = SERIAL_GET_PARITY(serial_config); in ns16550_serial_setconfig() local 447 switch (parity) { in ns16550_serial_setconfig()
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A D | usbtty.c | 271 .parity = 0x00,
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/u-boot/arch/powerpc/cpu/mpc83xx/hid/ |
A D | Kconfig | 9 bool "Enable cache parity errors" 12 bool "Enable address parity checking" 15 bool "Enable data parity checking" 90 bool "Enable cache parity errors" 93 bool "Enable address parity checking" 96 bool "Enable data parity checking"
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/u-boot/doc/device-tree-bindings/arm/ |
A D | l2c2x0.txt | 77 - arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310). 78 - arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
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/u-boot/board/Marvell/octeon_ebb7304/ |
A D | board_ddr.h | 365 .parity = 0 \ 418 .parity = 0 \
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/u-boot/arch/arm/dts/ |
A D | armada-xp-crs328-4c-20s-4s.dtsi | 44 arm,parity-enable;
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A D | armada-xp-crs305-1g-4s.dtsi | 44 arm,parity-enable;
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A D | armada-xp-crs326-24g-2s.dtsi | 44 arm,parity-enable;
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A D | armada-xp-db-xc3-24g4xg.dts | 43 arm,parity-enable;
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/u-boot/arch/x86/include/asm/acpi/ |
A D | debug.asl | 34 Store(0x03, CLCR) /* word=8 stop=1 parity=none */
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/u-boot/doc/ |
A D | README.fsl-ddr | 127 Memory address parity on/off 129 address parity can be turned on/off by hwconfig. 131 hwconfig=fsl_ddr:parity=on
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/u-boot/lib/efi_loader/ |
A D | efi_device_path_to_text.c | 125 uart->data_bits, uart->parity); in dp_msging()
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/u-boot/include/acpi/ |
A D | acpi_table.h | 547 u8 parity; member
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/u-boot/board/cadence/xtfpga/ |
A D | README | 44 The serial port defaults to 115200 baud, no parity and 1 stop bit.
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/u-boot/arch/mips/mach-octeon/include/mach/ |
A D | octeon_ddr.h | 730 u8 parity; member
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/u-boot/lib/ |
A D | bch.c | 330 static inline int parity(unsigned int x) in parity() function 546 tmp |= parity(mask) << (m-r); in solve_linear_system()
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/u-boot/arch/x86/lib/ |
A D | acpi_table.c | 454 spcr->parity = SERIAL_GET_PARITY(serial_config); in acpi_create_spcr()
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/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
A D | README.soc | 131 A53 processor, with 32 KB of parity protected L1-I cache,
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/u-boot/doc/board/AndesTech/ |
A D | ax25-ae350.rst | 37 - Protection scheme: parity-checking or error-checking-and-correction (ECC)
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/u-boot/drivers/ram/octeon/ |
A D | octeon3_lmc.c | 4107 dimm_ctl.s.parity = c_cfg->parity; in lmc_dimm01_params() 4123 dimm_ctl.s.parity = simple_strtoul(s, NULL, 0); in lmc_dimm01_params() 4165 dimm_ctl.s.parity = c_cfg->parity; in lmc_dimm01_params() 4181 dimm_ctl.s.parity = simple_strtoul(s, NULL, 0); in lmc_dimm01_params()
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